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04b8a9fea5
Backstop support for non-sse2 chips now that 387 is gone. RELNOTE=yes Change-Id: Ib10e69c4a3654c15a03568f93393437e1939e013 Reviewed-on: https://go-review.googlesource.com/c/go/+/260017 Trust: Keith Randall <khr@golang.org> Run-TryBot: Keith Randall <khr@golang.org> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Ian Lance Taylor <iant@golang.org>
157 lines
3.2 KiB
Go
157 lines
3.2 KiB
Go
// asmcheck
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package codegen
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// This file contains codegen tests related to arithmetic
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// simplifications and optimizations on float types.
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// For codegen tests on integer types, see arithmetic.go.
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// --------------------- //
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// Strength-reduce //
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// --------------------- //
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func Mul2(f float64) float64 {
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// 386/sse2:"ADDSD",-"MULSD"
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// amd64:"ADDSD",-"MULSD"
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// arm/7:"ADDD",-"MULD"
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// arm64:"FADDD",-"FMULD"
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// ppc64:"FADD",-"FMUL"
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// ppc64le:"FADD",-"FMUL"
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return f * 2.0
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}
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func DivPow2(f1, f2, f3 float64) (float64, float64, float64) {
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// 386/sse2:"MULSD",-"DIVSD"
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// amd64:"MULSD",-"DIVSD"
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// arm/7:"MULD",-"DIVD"
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// arm64:"FMULD",-"FDIVD"
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// ppc64:"FMUL",-"FDIV"
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// ppc64le:"FMUL",-"FDIV"
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x := f1 / 16.0
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// 386/sse2:"MULSD",-"DIVSD"
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// amd64:"MULSD",-"DIVSD"
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// arm/7:"MULD",-"DIVD"
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// arm64:"FMULD",-"FDIVD"
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// ppc64:"FMUL",-"FDIVD"
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// ppc64le:"FMUL",-"FDIVD"
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y := f2 / 0.125
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// 386/sse2:"ADDSD",-"DIVSD",-"MULSD"
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// amd64:"ADDSD",-"DIVSD",-"MULSD"
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// arm/7:"ADDD",-"MULD",-"DIVD"
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// arm64:"FADDD",-"FMULD",-"FDIVD"
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// ppc64:"FADD",-"FMUL",-"FDIV"
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// ppc64le:"FADD",-"FMUL",-"FDIV"
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z := f3 / 0.5
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return x, y, z
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}
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func indexLoad(b0 []float32, b1 float32, idx int) float32 {
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// arm64:`FMOVS\s\(R[0-9]+\)\(R[0-9]+\),\sF[0-9]+`
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return b0[idx] * b1
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}
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func indexStore(b0 []float64, b1 float64, idx int) {
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// arm64:`FMOVD\sF[0-9]+,\s\(R[0-9]+\)\(R[0-9]+\)`
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b0[idx] = b1
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}
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// ----------- //
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// Fused //
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// ----------- //
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func FusedAdd32(x, y, z float32) float32 {
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// s390x:"FMADDS\t"
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// ppc64:"FMADDS\t"
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// ppc64le:"FMADDS\t"
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// arm64:"FMADDS"
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return x*y + z
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}
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func FusedSub32_a(x, y, z float32) float32 {
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// s390x:"FMSUBS\t"
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// ppc64:"FMSUBS\t"
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// ppc64le:"FMSUBS\t"
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return x*y - z
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}
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func FusedSub32_b(x, y, z float32) float32 {
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// arm64:"FMSUBS"
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return z - x*y
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}
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func FusedAdd64(x, y, z float64) float64 {
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// s390x:"FMADD\t"
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// ppc64:"FMADD\t"
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// ppc64le:"FMADD\t"
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// arm64:"FMADDD"
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return x*y + z
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}
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func FusedSub64_a(x, y, z float64) float64 {
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// s390x:"FMSUB\t"
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// ppc64:"FMSUB\t"
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// ppc64le:"FMSUB\t"
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return x*y - z
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}
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func FusedSub64_b(x, y, z float64) float64 {
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// arm64:"FMSUBD"
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return z - x*y
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}
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func Cmp(f float64) bool {
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// arm64:"FCMPD","(BGT|BLE|BMI|BPL)",-"CSET\tGT",-"CBZ"
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return f > 4 || f < -4
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}
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func CmpZero64(f float64) bool {
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// s390x:"LTDBR",-"FCMPU"
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return f <= 0
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}
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func CmpZero32(f float32) bool {
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// s390x:"LTEBR",-"CEBR"
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return f <= 0
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}
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func CmpWithSub(a float64, b float64) bool {
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f := a - b
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// s390x:-"LTDBR"
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return f <= 0
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}
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func CmpWithAdd(a float64, b float64) bool {
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f := a + b
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// s390x:-"LTDBR"
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return f <= 0
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}
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// ---------------- //
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// Non-floats //
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// ---------------- //
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// We should make sure that the compiler doesn't generate floating point
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// instructions for non-float operations on Plan 9, because floating point
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// operations are not allowed in the note handler.
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func ArrayZero() [16]byte {
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// amd64:"MOVUPS"
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// plan9/amd64/:-"MOVUPS"
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var a [16]byte
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return a
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}
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func ArrayCopy(a [16]byte) (b [16]byte) {
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// amd64:"MOVUPS"
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// plan9/amd64/:-"MOVUPS"
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b = a
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return
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}
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