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https://github.com/golang/go
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cmd/compile, math: improve implementation of math.{Max,Min} on loong64
Make math.{Min,Max} intrinsics and implement math.{archMax,archMin}
in hardware.
goos: linux
goarch: loong64
pkg: math
cpu: Loongson-3A6000 @ 2500.00MHz
│ old.bench │ new.bench │
│ sec/op │ sec/op vs base │
Max 7.606n ± 0% 3.087n ± 0% -59.41% (p=0.000 n=20)
Min 7.205n ± 0% 2.904n ± 0% -59.69% (p=0.000 n=20)
MinFloat 37.220n ± 0% 4.802n ± 0% -87.10% (p=0.000 n=20)
MaxFloat 33.620n ± 0% 4.802n ± 0% -85.72% (p=0.000 n=20)
geomean 16.18n 3.792n -76.57%
goos: linux
goarch: loong64
pkg: runtime
cpu: Loongson-3A5000 @ 2500.00MHz
│ old.bench │ new.bench │
│ sec/op │ sec/op vs base │
Max 10.010n ± 0% 7.196n ± 0% -28.11% (p=0.000 n=20)
Min 8.806n ± 0% 7.155n ± 0% -18.75% (p=0.000 n=20)
MinFloat 60.010n ± 0% 7.976n ± 0% -86.71% (p=0.000 n=20)
MaxFloat 56.410n ± 0% 7.980n ± 0% -85.85% (p=0.000 n=20)
geomean 23.37n 7.566n -67.63%
Updates #59120.
Change-Id: I6815d20bc304af3cbf5d6ca8fe0ca1c2ddebea2d
Reviewed-on: https://go-review.googlesource.com/c/go/+/580283
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: David Chase <drchase@google.com>
This commit is contained in:
Xiaolin Zhao
abner chenc
parent
36e5c84ffa
commit
ff14e08cd3
@ -184,6 +184,64 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.Reg = v.Args[0].Reg()
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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case ssa.OpLOONG64FMINF,
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ssa.OpLOONG64FMIND,
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ssa.OpLOONG64FMAXF,
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ssa.OpLOONG64FMAXD:
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// ADDD Rarg0, Rarg1, Rout
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// CMPEQD Rarg0, Rarg0, FCC0
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// bceqz FCC0, end
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// CMPEQD Rarg1, Rarg1, FCC0
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// bceqz FCC0, end
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// F(MIN|MAX)(F|D)
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r0 := v.Args[0].Reg()
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r1 := v.Args[1].Reg()
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out := v.Reg()
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add, fcmp := loong64.AADDD, loong64.ACMPEQD
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if v.Op == ssa.OpLOONG64FMINF || v.Op == ssa.OpLOONG64FMAXF {
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add = loong64.AADDF
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fcmp = loong64.ACMPEQF
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}
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p1 := s.Prog(add)
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p1.From.Type = obj.TYPE_REG
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p1.From.Reg = r0
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p1.Reg = r1
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p1.To.Type = obj.TYPE_REG
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p1.To.Reg = out
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p2 := s.Prog(fcmp)
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p2.From.Type = obj.TYPE_REG
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p2.From.Reg = r0
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p2.Reg = r0
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p2.To.Type = obj.TYPE_REG
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p2.To.Reg = loong64.REG_FCC0
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p3 := s.Prog(loong64.ABFPF)
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p3.To.Type = obj.TYPE_BRANCH
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p4 := s.Prog(fcmp)
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p4.From.Type = obj.TYPE_REG
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p4.From.Reg = r1
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p4.Reg = r1
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p4.To.Type = obj.TYPE_REG
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p4.To.Reg = loong64.REG_FCC0
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p5 := s.Prog(loong64.ABFPF)
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p5.To.Type = obj.TYPE_BRANCH
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p6 := s.Prog(v.Op.Asm())
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p6.From.Type = obj.TYPE_REG
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p6.From.Reg = r1
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p6.Reg = r0
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p6.To.Type = obj.TYPE_REG
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p6.To.Reg = out
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nop := s.Prog(obj.ANOP)
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p3.To.SetTarget(nop)
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p5.To.SetTarget(nop)
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case ssa.OpLOONG64SGT,
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ssa.OpLOONG64SGTU:
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p := s.Prog(v.Op.Asm())
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@ -132,6 +132,9 @@
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(Sqrt ...) => (SQRTD ...)
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(Sqrt32 ...) => (SQRTF ...)
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(Min(64|32)F ...) => (FMIN(D|F) ...)
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(Max(64|32)F ...) => (FMAX(D|F) ...)
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// boolean ops -- booleans are represented with 0=false, 1=true
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(AndB ...) => (AND ...)
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(OrB ...) => (OR ...)
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@ -193,6 +193,11 @@ func init() {
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{name: "SQRTD", argLength: 1, reg: fp11, asm: "SQRTD"}, // sqrt(arg0), float64
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{name: "SQRTF", argLength: 1, reg: fp11, asm: "SQRTF"}, // sqrt(arg0), float32
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{name: "MINF", argLength: 2, reg: fp21, resultNotInArgs: true, asm: "MINF", commutative: true, typ: "Float32"}, // min(arg0, arg1), float32
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{name: "MIND", argLength: 2, reg: fp21, resultNotInArgs: true, asm: "MIND", commutative: true, typ: "Float64"}, // min(arg0, arg1), float64
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{name: "MAXF", argLength: 2, reg: fp21, resultNotInArgs: true, asm: "MAXF", commutative: true, typ: "Float32"}, // max(arg0, arg1), float32
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{name: "MAXD", argLength: 2, reg: fp21, resultNotInArgs: true, asm: "MAXD", commutative: true, typ: "Float64"}, // max(arg0, arg1), float64
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{name: "MASKEQZ", argLength: 2, reg: gp21, asm: "MASKEQZ"}, // returns 0 if arg1 == 0, otherwise returns arg0
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{name: "MASKNEZ", argLength: 2, reg: gp21, asm: "MASKNEZ"}, // returns 0 if arg1 != 0, otherwise returns arg0
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@ -1773,6 +1773,10 @@ const (
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OpLOONG64NEGD
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OpLOONG64SQRTD
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OpLOONG64SQRTF
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OpLOONG64FMINF
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OpLOONG64FMIND
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OpLOONG64FMAXF
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OpLOONG64FMAXD
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OpLOONG64MASKEQZ
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OpLOONG64MASKNEZ
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OpLOONG64SLLV
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@ -23874,6 +23878,70 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "FMINF",
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argLen: 2,
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commutative: true,
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resultNotInArgs: true,
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asm: loong64.AFMINF,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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{1, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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},
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outputs: []outputInfo{
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{0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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},
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},
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},
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{
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name: "FMIND",
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argLen: 2,
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commutative: true,
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resultNotInArgs: true,
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asm: loong64.AFMIND,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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{1, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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},
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outputs: []outputInfo{
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{0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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},
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},
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},
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{
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name: "FMAXF",
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argLen: 2,
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commutative: true,
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resultNotInArgs: true,
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asm: loong64.AFMAXF,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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{1, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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},
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outputs: []outputInfo{
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{0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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},
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},
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},
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{
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name: "FMAXD",
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argLen: 2,
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commutative: true,
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resultNotInArgs: true,
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asm: loong64.AFMAXD,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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{1, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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},
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outputs: []outputInfo{
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{0, 4611686017353646080}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
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},
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},
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},
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{
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name: "MASKEQZ",
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argLen: 2,
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@ -416,6 +416,18 @@ func rewriteValueLOONG64(v *Value) bool {
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return rewriteValueLOONG64_OpLsh8x64(v)
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case OpLsh8x8:
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return rewriteValueLOONG64_OpLsh8x8(v)
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case OpMax32F:
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v.Op = OpLOONG64FMAXF
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return true
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case OpMax64F:
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v.Op = OpLOONG64FMAXD
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return true
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case OpMin32F:
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v.Op = OpLOONG64FMINF
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return true
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case OpMin64F:
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v.Op = OpLOONG64FMIND
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return true
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case OpMod16:
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return rewriteValueLOONG64_OpMod16(v)
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case OpMod16u:
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@ -3731,7 +3731,7 @@ func (s *state) minMax(n *ir.CallExpr) *ssa.Value {
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if typ.IsFloat() {
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hasIntrinsic := false
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switch Arch.LinkArch.Family {
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case sys.AMD64, sys.ARM64, sys.RISCV64:
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case sys.AMD64, sys.ARM64, sys.Loong64, sys.RISCV64:
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hasIntrinsic = true
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case sys.PPC64:
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hasIntrinsic = buildcfg.GOPPC64 >= 9
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@ -2,7 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build amd64 || arm64 || riscv64 || s390x
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//go:build amd64 || arm64 || loong64 || riscv64 || s390x
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package math
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77
src/math/dim_loong64.s
Normal file
77
src/math/dim_loong64.s
Normal file
@ -0,0 +1,77 @@
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// Copyright 2024 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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#include "textflag.h"
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#define PosInf 0x7FF0000000000000
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#define NaN 0x7FF8000000000001
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#define NegInf 0xFFF0000000000000
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TEXT ·archMax(SB),NOSPLIT,$0
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MOVD x+0(FP), F0
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MOVD y+8(FP), F1
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FCLASSD F0, F2
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FCLASSD F1, F3
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// combine x and y categories together to judge
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MOVV F2, R4
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MOVV F3, R5
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OR R5, R4
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// +Inf special cases
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AND $64, R4, R5
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BNE R5, isPosInf
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// NaN special cases
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AND $2, R4, R5
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BNE R5, isMaxNaN
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// normal case
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FMAXD F0, F1, F0
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MOVD F0, ret+16(FP)
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RET
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isMaxNaN:
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MOVV $NaN, R6
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MOVV R6, ret+16(FP)
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RET
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isPosInf:
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MOVV $PosInf, R6
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MOVV R6, ret+16(FP)
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RET
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TEXT ·archMin(SB),NOSPLIT,$0
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MOVD x+0(FP), F0
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MOVD y+8(FP), F1
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FCLASSD F0, F2
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FCLASSD F1, F3
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// combine x and y categories together to judge
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MOVV F2, R4
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MOVV F3, R5
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OR R5, R4
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// -Inf special cases
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AND $4, R4, R5
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BNE R5, isNegInf
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// NaN special cases
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AND $2, R4, R5
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BNE R5, isMinNaN
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// normal case
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FMIND F0, F1, F0
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MOVD F0, ret+16(FP)
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RET
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isMinNaN:
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MOVV $NaN, R6
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MOVV R6, ret+16(FP)
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RET
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isNegInf:
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MOVV $NegInf, R6
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MOVV R6, ret+16(FP)
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RET
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@ -2,7 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build !amd64 && !arm64 && !riscv64 && !s390x
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//go:build !amd64 && !arm64 && !loong64 && !riscv64 && !s390x
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package math
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@ -164,6 +164,7 @@ func ArrayCopy(a [16]byte) (b [16]byte) {
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func Float64Min(a, b float64) float64 {
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// amd64:"MINSD"
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// arm64:"FMIND"
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// loong64:"FMIND"
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// riscv64:"FMIN"
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// ppc64/power9:"XSMINJDP"
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// ppc64/power10:"XSMINJDP"
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@ -173,6 +174,7 @@ func Float64Min(a, b float64) float64 {
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func Float64Max(a, b float64) float64 {
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// amd64:"MINSD"
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// arm64:"FMAXD"
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// loong64:"FMAXD"
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// riscv64:"FMAX"
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// ppc64/power9:"XSMAXJDP"
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// ppc64/power10:"XSMAXJDP"
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@ -182,6 +184,7 @@ func Float64Max(a, b float64) float64 {
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func Float32Min(a, b float32) float32 {
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// amd64:"MINSS"
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// arm64:"FMINS"
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// loong64:"FMINF"
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// riscv64:"FMINS"
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// ppc64/power9:"XSMINJDP"
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// ppc64/power10:"XSMINJDP"
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@ -191,6 +194,7 @@ func Float32Min(a, b float32) float32 {
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func Float32Max(a, b float32) float32 {
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// amd64:"MINSS"
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// arm64:"FMAXS"
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// loong64:"FMAXF"
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// riscv64:"FMAXS"
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// ppc64/power9:"XSMAXJDP"
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// ppc64/power10:"XSMAXJDP"
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