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cmd/compile: make LR allocatable in non-leaf functions on ARM

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The mechanism is initially introduced (and reviewed) in CL 30597
on S390X.

Reduce number of "spilled value remains" by 0.4% in cmd/go.

Disabled on ARMv5 because LR is clobbered almost everywhere with
inserted softfloat calls.

Change-Id: I2934737ce2455909647ed2118fe2bd6f0aa5ac52
Reviewed-on: https://go-review.googlesource.com/32178
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
This commit is contained in:
Cherry Zhang 2016-10-26 15:44:19 -04:00
parent 4f1ca8b6f9
commit f9238a76ff
3 changed files with 531 additions and 524 deletions
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10
src/cmd/compile/internal/ssa/gen/ARMOps.go
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@ -87,7 +87,7 @@ func init() {
// Common individual register masks
var (
gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12")
gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14")
gpg = gp | buildReg("g")
gpsp = gp | buildReg("SP")
gpspg = gpg | buildReg("SP")
@ -148,7 +148,7 @@ func init() {
reg: regInfo{
inputs: []regMask{buildReg("R1"), buildReg("R0")},
outputs: []regMask{buildReg("R0"), buildReg("R1")},
clobbers: buildReg("R2 R3"), // also clobbers R12 on NaCl (modified in ../config.go)
clobbers: buildReg("R2 R3 R14"), // also clobbers R12 on NaCl (modified in ../config.go)
},
clobberFlags: true,
typ: "(UInt32,UInt32)",
@ -406,7 +406,7 @@ func init() {
argLength: 3,
reg: regInfo{
inputs: []regMask{buildReg("R1"), buildReg("R0")},
clobbers: buildReg("R1"),
clobbers: buildReg("R1 R14"),
},
faultOnNilArg0: true,
},
@ -423,7 +423,7 @@ func init() {
argLength: 3,
reg: regInfo{
inputs: []regMask{buildReg("R2"), buildReg("R1")},
clobbers: buildReg("R0 R1 R2"),
clobbers: buildReg("R0 R1 R2 R14"),
},
faultOnNilArg0: true,
faultOnNilArg1: true,
@ -526,6 +526,6 @@ func init() {
gpregmask: gp,
fpregmask: fp,
framepointerreg: -1, // not used
linkreg: -1, // not used
linkreg: int8(num["R14"]),
})
}

1032
src/cmd/compile/internal/ssa/opGen.go
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File diff suppressed because it is too large Load Diff

7
src/cmd/compile/internal/ssa/regalloc.go
View File

@ -106,6 +106,7 @@
package ssa
import (
"cmd/internal/obj"
"fmt"
"unsafe"
)
@ -527,6 +528,12 @@ func (s *regAllocState) init(f *Func) {
// Leaf functions don't save/restore the link register.
s.allocatable &^= 1 << uint(s.f.Config.LinkReg)
}
if s.f.Config.arch == "arm" && obj.GOARM == 5 {
// On ARMv5 we insert softfloat calls at each FP instruction.
// This clobbers LR almost everywhere. Disable allocating LR
// on ARMv5.
s.allocatable &^= 1 << uint(s.f.Config.LinkReg)
}
}
if s.f.Config.ctxt.Flag_dynlink {
switch s.f.Config.arch {