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cmd/internal/obj/ppc64: generate float 0 more efficiently on ppc64x
This change makes use of a VSX instruction to generate the float 0 value instead of generating a constant in memory and loading it from there. This uses 1 instruction instead of 2 and avoids a memory reference. in the +0 case, uses 2 instructions in the -0 case but avoids the memory reference. Since this is done in the assembler for ppc64x, an update has been made to the assembler test. Change-Id: Ief7dddcb057bfb602f78215f6947664e8c841464 Reviewed-on: https://go-review.googlesource.com/c/139420 Reviewed-by: Michael Munday <mike.munday@ibm.com>
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8f9902da26
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3
src/cmd/asm/internal/asm/testdata/ppc64enc.s
vendored
3
src/cmd/asm/internal/asm/testdata/ppc64enc.s
vendored
@ -98,4 +98,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
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LDAR (R4),$0,R5 // 7ca020a8
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LDAR (R4),$0,R5 // 7ca020a8
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LDAR (R3),R5 // 7ca018a8
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LDAR (R3),R5 // 7ca018a8
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// float constants
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FMOVD $(0.0), F1 // f0210cd0
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FMOVD $(-0.0), F1 // f0210cd0fc200850
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RET
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RET
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@ -35,6 +35,7 @@ import (
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"encoding/binary"
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"encoding/binary"
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"fmt"
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"fmt"
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"log"
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"log"
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"math"
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"sort"
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"sort"
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)
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)
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@ -342,6 +343,8 @@ var optab = []Optab{
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{AFMOVD, C_LEXT, C_NONE, C_NONE, C_FREG, 36, 8, REGSB},
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{AFMOVD, C_LEXT, C_NONE, C_NONE, C_FREG, 36, 8, REGSB},
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{AFMOVD, C_LAUTO, C_NONE, C_NONE, C_FREG, 36, 8, REGSP},
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{AFMOVD, C_LAUTO, C_NONE, C_NONE, C_FREG, 36, 8, REGSP},
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{AFMOVD, C_LOREG, C_NONE, C_NONE, C_FREG, 36, 8, REGZERO},
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{AFMOVD, C_LOREG, C_NONE, C_NONE, C_FREG, 36, 8, REGZERO},
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{AFMOVD, C_ZCON, C_NONE, C_NONE, C_FREG, 24, 4, 0},
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{AFMOVD, C_ADDCON, C_NONE, C_NONE, C_FREG, 24, 8, 0},
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{AFMOVD, C_ADDR, C_NONE, C_NONE, C_FREG, 75, 8, 0},
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{AFMOVD, C_ADDR, C_NONE, C_NONE, C_FREG, 75, 8, 0},
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{AFMOVD, C_FREG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB},
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{AFMOVD, C_FREG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB},
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{AFMOVD, C_FREG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP},
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{AFMOVD, C_FREG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP},
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@ -829,6 +832,18 @@ func (c *ctxt9) aclass(a *obj.Addr) int {
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case obj.TYPE_TEXTSIZE:
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case obj.TYPE_TEXTSIZE:
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return C_TEXTSIZE
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return C_TEXTSIZE
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case obj.TYPE_FCONST:
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// The only cases where FCONST will occur are with float64 +/- 0.
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// All other float constants are generated in memory.
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f64 := a.Val.(float64)
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if f64 == 0 {
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if math.Signbit(f64) {
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return C_ADDCON
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}
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return C_ZCON
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}
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log.Fatalf("Unexpected nonzero FCONST operand %v", a)
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case obj.TYPE_CONST,
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case obj.TYPE_CONST,
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obj.TYPE_ADDR:
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obj.TYPE_ADDR:
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switch a.Name {
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switch a.Name {
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@ -2763,6 +2778,13 @@ func (c *ctxt9) asmout(p *obj.Prog, o *Optab, out []uint32) {
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c.ctxt.Diag("%v is not supported", p)
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c.ctxt.Diag("%v is not supported", p)
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}
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}
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case 24: /* lfd fA,float64(0) -> xxlxor xsA,xsaA,xsaA + fneg for -0 */
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o1 = AOP_XX3I(c.oprrr(AXXLXOR), uint32(p.To.Reg), uint32(p.To.Reg), uint32(p.To.Reg), uint32(0))
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// This is needed for -0.
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if o.size == 8 {
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o2 = AOP_RRR(c.oprrr(AFNEG), uint32(p.To.Reg), 0, uint32(p.To.Reg))
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}
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case 25:
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case 25:
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/* sld[.] $sh,rS,rA -> rldicr[.] $sh,rS,mask(0,63-sh),rA; srd[.] -> rldicl */
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/* sld[.] $sh,rS,rA -> rldicr[.] $sh,rS,mask(0,63-sh),rA; srd[.] -> rldicl */
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v := c.regoff(&p.From)
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v := c.regoff(&p.From)
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@ -67,10 +67,13 @@ func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) {
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case AFMOVD:
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case AFMOVD:
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if p.From.Type == obj.TYPE_FCONST {
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if p.From.Type == obj.TYPE_FCONST {
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f64 := p.From.Val.(float64)
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f64 := p.From.Val.(float64)
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p.From.Type = obj.TYPE_MEM
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// Constant not needed in memory for float +/- 0
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p.From.Sym = ctxt.Float64Sym(f64)
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if f64 != 0 {
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p.From.Name = obj.NAME_EXTERN
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p.From.Type = obj.TYPE_MEM
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p.From.Offset = 0
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p.From.Sym = ctxt.Float64Sym(f64)
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p.From.Name = obj.NAME_EXTERN
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p.From.Offset = 0
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}
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}
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}
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// Put >32-bit constants in memory and load them
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// Put >32-bit constants in memory and load them
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