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runtime: unbreak linux/riscv64 following regabi merge

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Unbreak the linux/riscv64 port by storing the zero value register to memory,
rather than the current code that is moving a zero intermediate to the stack
pointer register (ideally this should be caught by the assembler). This was
broken in CL#272568.

On riscv64 a zero immediate value cannot be moved directly to memory, rather
a register needs to be loaded with zero and then stored. Alternatively, the
the zero value register (aka X0) can be used directly.

Change-Id: Id57121541d50c9993cec5c2270b638b184ab9bc1
Reviewed-on: https://go-review.googlesource.com/c/go/+/292894
Trust: Joel Sing <joel@sing.id.au>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Michael Knyszek <mknyszek@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
This commit is contained in:
Joel Sing 2021-02-17 20:34:34 +11:00
parent 07ef313525
commit f0be3cc547
1 changed files with 1 additions and 1 deletions
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2
src/runtime/asm_riscv64.s
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@ -449,7 +449,7 @@ TEXT callRet<>(SB), NOSPLIT, $40-0
MOV A1, 16(X2) MOV A1, 16(X2)
MOV A3, 24(X2) MOV A3, 24(X2)
MOV A2, 32(X2) MOV A2, 32(X2)
MOV $0, 40(X2) MOV ZERO, 40(X2)
CALL runtime·reflectcallmove(SB) CALL runtime·reflectcallmove(SB)
RET RET