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cmd/compile: intrinsify Mul64 on riscv64
According to RISCV instruction set manual v2.2 Sec 6.1 MULHU followed by MUL will be fused into one multiply by microarchitecture Benchstat on Hifive unmatched: name old time/op new time/op delta Hash8Bytes 245ns ± 3% 186ns ± 4% -23.99% (p=0.000 n=10+10) Hash320Bytes 1.94µs ± 1% 1.31µs ± 1% -32.38% (p=0.000 n=9+10) Hash1K 5.84µs ± 0% 3.84µs ± 0% -34.20% (p=0.000 n=10+9) Hash8K 45.3µs ± 0% 29.4µs ± 0% -35.04% (p=0.000 n=10+10) name old speed new speed delta Hash8Bytes 32.7MB/s ± 3% 43.0MB/s ± 4% +31.61% (p=0.000 n=10+10) Hash320Bytes 165MB/s ± 1% 244MB/s ± 1% +47.88% (p=0.000 n=9+10) Hash1K 175MB/s ± 0% 266MB/s ± 0% +51.98% (p=0.000 n=10+9) Hash8K 181MB/s ± 0% 279MB/s ± 0% +53.94% (p=0.000 n=10+10) Change-Id: I3561495d02a4a0ad8578e9b9819bf0a4eaca5d12 Reviewed-on: https://go-review.googlesource.com/c/go/+/329970 Reviewed-by: Joel Sing <joel@sing.id.au> Run-TryBot: Joel Sing <joel@sing.id.au> TryBot-Result: Go Bot <gobot@golang.org> Trust: Meng Zhuo <mzh@golangcn.org>
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@ -282,6 +282,21 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.Reg = r1
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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case ssa.OpRISCV64LoweredMuluhilo:
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r0 := v.Args[0].Reg()
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r1 := v.Args[1].Reg()
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p := s.Prog(riscv.AMULHU)
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p.From.Type = obj.TYPE_REG
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p.From.Reg = r1
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p.Reg = r0
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg0()
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p1 := s.Prog(riscv.AMUL)
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p1.From.Type = obj.TYPE_REG
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p1.From.Reg = r1
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p1.Reg = r0
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p1.To.Type = obj.TYPE_REG
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p1.To.Reg = v.Reg1()
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case ssa.OpRISCV64FSQRTS, ssa.OpRISCV64FNEGS, ssa.OpRISCV64FSQRTD, ssa.OpRISCV64FNEGD,
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ssa.OpRISCV64FMVSX, ssa.OpRISCV64FMVDX,
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ssa.OpRISCV64FCVTSW, ssa.OpRISCV64FCVTSL, ssa.OpRISCV64FCVTWS, ssa.OpRISCV64FCVTLS,
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@ -29,6 +29,7 @@
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(Sub64F ...) => (FSUBD ...)
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(Mul64 ...) => (MUL ...)
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(Mul64uhilo ...) => (LoweredMuluhilo ...)
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(Mul32 ...) => (MULW ...)
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(Mul16 x y) => (MULW (SignExt16to32 x) (SignExt16to32 y))
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(Mul8 x y) => (MULW (SignExt8to32 x) (SignExt8to32 y))
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@ -123,6 +123,7 @@ func init() {
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gp01 = regInfo{outputs: []regMask{gpMask}}
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gp11 = regInfo{inputs: []regMask{gpMask}, outputs: []regMask{gpMask}}
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gp21 = regInfo{inputs: []regMask{gpMask, gpMask}, outputs: []regMask{gpMask}}
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gp22 = regInfo{inputs: []regMask{gpMask, gpMask}, outputs: []regMask{gpMask, gpMask}}
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gpload = regInfo{inputs: []regMask{gpspsbMask, 0}, outputs: []regMask{gpMask}}
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gp11sb = regInfo{inputs: []regMask{gpspsbMask}, outputs: []regMask{gpMask}}
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gpxchg = regInfo{inputs: []regMask{gpspsbgMask, gpgMask}, outputs: []regMask{gpMask}}
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@ -157,6 +158,8 @@ func init() {
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{name: "MULW", argLength: 2, reg: gp21, asm: "MULW", commutative: true, typ: "Int32"},
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{name: "MULH", argLength: 2, reg: gp21, asm: "MULH", commutative: true, typ: "Int64"},
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{name: "MULHU", argLength: 2, reg: gp21, asm: "MULHU", commutative: true, typ: "UInt64"},
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{name: "LoweredMuluhilo", argLength: 2, reg: gp22, resultNotInArgs: true}, // arg0 * arg1, return (hi, lo)
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{name: "DIV", argLength: 2, reg: gp21, asm: "DIV", typ: "Int64"}, // arg0 / arg1
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{name: "DIVU", argLength: 2, reg: gp21, asm: "DIVU", typ: "UInt64"},
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{name: "DIVW", argLength: 2, reg: gp21, asm: "DIVW", typ: "Int32"},
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@ -2069,6 +2069,7 @@ const (
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OpRISCV64MULW
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OpRISCV64MULH
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OpRISCV64MULHU
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OpRISCV64LoweredMuluhilo
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OpRISCV64DIV
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OpRISCV64DIVU
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OpRISCV64DIVW
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@ -27603,6 +27604,21 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "LoweredMuluhilo",
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argLen: 2,
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resultNotInArgs: true,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
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{1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
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},
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outputs: []outputInfo{
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{0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
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{1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
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},
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},
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},
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{
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name: "DIV",
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argLen: 2,
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@ -356,6 +356,9 @@ func rewriteValueRISCV64(v *Value) bool {
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case OpMul64F:
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v.Op = OpRISCV64FMULD
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return true
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case OpMul64uhilo:
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v.Op = OpRISCV64LoweredMuluhilo
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return true
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case OpMul8:
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return rewriteValueRISCV64_OpMul8(v)
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case OpNeg16:
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@ -4505,9 +4505,9 @@ func InitTables() {
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func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
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return s.newValue2(ssa.OpMul64uhilo, types.NewTuple(types.Types[types.TUINT64], types.Types[types.TUINT64]), args[0], args[1])
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},
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sys.AMD64, sys.ARM64, sys.PPC64, sys.S390X, sys.MIPS64)
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alias("math/bits", "Mul", "math/bits", "Mul64", sys.ArchAMD64, sys.ArchARM64, sys.ArchPPC64, sys.ArchPPC64LE, sys.ArchS390X, sys.ArchMIPS64, sys.ArchMIPS64LE)
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alias("runtime/internal/math", "Mul64", "math/bits", "Mul64", sys.ArchAMD64, sys.ArchARM64, sys.ArchPPC64, sys.ArchPPC64LE, sys.ArchS390X, sys.ArchMIPS64, sys.ArchMIPS64LE)
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sys.AMD64, sys.ARM64, sys.PPC64, sys.S390X, sys.MIPS64, sys.RISCV64)
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alias("math/bits", "Mul", "math/bits", "Mul64", sys.ArchAMD64, sys.ArchARM64, sys.ArchPPC64, sys.ArchPPC64LE, sys.ArchS390X, sys.ArchMIPS64, sys.ArchMIPS64LE, sys.ArchRISCV64)
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alias("runtime/internal/math", "Mul64", "math/bits", "Mul64", sys.ArchAMD64, sys.ArchARM64, sys.ArchPPC64, sys.ArchPPC64LE, sys.ArchS390X, sys.ArchMIPS64, sys.ArchMIPS64LE, sys.ArchRISCV64)
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addF("math/bits", "Add64",
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func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
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return s.newValue3(ssa.OpAdd64carry, types.NewTuple(types.Types[types.TUINT64], types.Types[types.TUINT64]), args[0], args[1], args[2])
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@ -710,6 +710,7 @@ func Mul64(x, y uint64) (hi, lo uint64) {
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// ppc64le:"MULHDU","MULLD"
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// s390x:"MLGR"
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// mips64: "MULVU"
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// riscv64:"MULHU","MUL"
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return bits.Mul64(x, y)
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}
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@ -1756,6 +1756,7 @@ var (
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"ppc64le": {"GOPPC64", "power8", "power9"},
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"s390x": {},
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"wasm": {},
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"riscv64": {},
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}
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)
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