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cmd/asm: reject avx512 .Z instructions without a mask register

Zeroing requires a non-K0 mask register be specified.
(gcc enforces this when assembling.)

The non-K0 restriction is already handled by the Yknot0 restriction.
But if the mask register is missing altogether, we misassemble the
instruction.

Fixes #57952

Not sure if this is really worth mentioning in the release notes,
but just in case I'll mark it.
RELNOTE=yes

Change-Id: I8f05d3155503f1f16d1b5ab9d67686fe5b64dfea
Reviewed-on: https://go-review.googlesource.com/c/go/+/463229
Auto-Submit: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
Run-TryBot: Keith Randall <khr@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Илья Токарь <tocarip@gmail.com>
Reviewed-by: Iskander Sharipov <quasilyte@gmail.com>
This commit is contained in:
Keith Randall 2023-01-26 17:25:44 -08:00 committed by Gopher Robot
parent 4952090739
commit ee5ce77c62
3 changed files with 15 additions and 1 deletions

View File

@ -891,7 +891,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
VPEXTRW $17, X20, (SP)(AX*2) // 62e37d0815244411 or 62e3fd0815244411 VPEXTRW $17, X20, (SP)(AX*2) // 62e37d0815244411 or 62e3fd0815244411
VPEXTRW $127, X20, (SP)(AX*2) // 62e37d081524447f or 62e3fd081524447f VPEXTRW $127, X20, (SP)(AX*2) // 62e37d081524447f or 62e3fd081524447f
// EVEX: embedded zeroing. // EVEX: embedded zeroing.
VADDPD.Z X30, X1, X0 // 6291f58858c6 VADDPD.Z X30, X1, K7, X0 // 6291f58f58c6
VMAXPD.Z (AX), Z2, K1, Z1 // 62f1edc95f08 VMAXPD.Z (AX), Z2, K1, Z1 // 62f1edc95f08
// EVEX: embedded rounding. // EVEX: embedded rounding.
VADDPD.RU_SAE Z3, Z2, K1, Z1 // 62f1ed5958cb VADDPD.RU_SAE Z3, Z2, K1, Z1 // 62f1ed5958cb

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@ -140,4 +140,8 @@ TEXT errors(SB),$0
TPAUSE (BX) // ERROR "invalid instruction" TPAUSE (BX) // ERROR "invalid instruction"
UMONITOR (BX) // ERROR "invalid instruction" UMONITOR (BX) // ERROR "invalid instruction"
UMWAIT (BX) // ERROR "invalid instruction" UMWAIT (BX) // ERROR "invalid instruction"
// .Z instructions
VMOVDQA32.Z Z0, Z1 // ERROR "mask register must be specified for .Z instructions"
VMOVDQA32.Z Z0, K0, Z1 // ERROR "invalid instruction"
VMOVDQA32.Z Z0, K1, Z1 // ok
RET RET

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@ -4070,6 +4070,16 @@ func (ab *AsmBuf) asmevex(ctxt *obj.Link, p *obj.Prog, rm, v, r, k *obj.Addr) {
if !evex.ZeroingEnabled() { if !evex.ZeroingEnabled() {
ctxt.Diag("unsupported zeroing: %v", p) ctxt.Diag("unsupported zeroing: %v", p)
} }
if k == nil {
// When you request zeroing you must specify a mask register.
// See issue 57952.
ctxt.Diag("mask register must be specified for .Z instructions: %v", p)
} else if k.Reg == REG_K0 {
// The mask register must not be K0. That restriction is already
// handled by the Yknot0 restriction in the opcode tables, so we
// won't ever reach here. But put something sensible here just in case.
ctxt.Diag("mask register must not be K0 for .Z instructions: %v", p)
}
evexZ = 1 evexZ = 1
} }
switch { switch {