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cmd/asm/internal/arch: adds the missing type check for arm64 SXTB extension
Operands of memory type do not support SXTB extension. This CL adds this missing check. Change-Id: I1fa438dd314fc8aeb889637079cc67b538e83a89 Reviewed-on: https://go-review.googlesource.com/c/go/+/342769 Reviewed-by: eric fang <eric.fang@arm.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Run-TryBot: eric fang <eric.fang@arm.com> TryBot-Result: Go Bot <gobot@golang.org> Trust: Michael Knyszek <mknyszek@google.com>
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@ -165,27 +165,21 @@ func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, i
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}
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}
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if reg <= arm64.REG_R31 && reg >= arm64.REG_R0 {
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if !isAmount {
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return errors.New("invalid register extension")
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}
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switch ext {
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case "UXTB":
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if !isAmount {
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return errors.New("invalid register extension")
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}
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if a.Type == obj.TYPE_MEM {
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return errors.New("invalid shift for the register offset addressing mode")
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}
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a.Reg = arm64.REG_UXTB + Rnum
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case "UXTH":
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if !isAmount {
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return errors.New("invalid register extension")
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}
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if a.Type == obj.TYPE_MEM {
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return errors.New("invalid shift for the register offset addressing mode")
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}
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a.Reg = arm64.REG_UXTH + Rnum
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case "UXTW":
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if !isAmount {
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return errors.New("invalid register extension")
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}
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// effective address of memory is a base register value and an offset register value.
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if a.Type == obj.TYPE_MEM {
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a.Index = arm64.REG_UXTW + Rnum
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@ -193,48 +187,33 @@ func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, i
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a.Reg = arm64.REG_UXTW + Rnum
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}
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case "UXTX":
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if !isAmount {
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return errors.New("invalid register extension")
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}
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if a.Type == obj.TYPE_MEM {
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return errors.New("invalid shift for the register offset addressing mode")
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}
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a.Reg = arm64.REG_UXTX + Rnum
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case "SXTB":
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if !isAmount {
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return errors.New("invalid register extension")
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if a.Type == obj.TYPE_MEM {
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return errors.New("invalid shift for the register offset addressing mode")
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}
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a.Reg = arm64.REG_SXTB + Rnum
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case "SXTH":
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if !isAmount {
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return errors.New("invalid register extension")
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}
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if a.Type == obj.TYPE_MEM {
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return errors.New("invalid shift for the register offset addressing mode")
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}
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a.Reg = arm64.REG_SXTH + Rnum
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case "SXTW":
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if !isAmount {
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return errors.New("invalid register extension")
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}
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if a.Type == obj.TYPE_MEM {
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a.Index = arm64.REG_SXTW + Rnum
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} else {
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a.Reg = arm64.REG_SXTW + Rnum
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}
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case "SXTX":
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if !isAmount {
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return errors.New("invalid register extension")
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}
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if a.Type == obj.TYPE_MEM {
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a.Index = arm64.REG_SXTX + Rnum
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} else {
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a.Reg = arm64.REG_SXTX + Rnum
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}
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case "LSL":
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if !isAmount {
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return errors.New("invalid register extension")
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}
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a.Index = arm64.REG_LSL + Rnum
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default:
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return errors.New("unsupported general register extension type: " + ext)
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