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https://github.com/golang/go
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[dev.cc] cmd/asm: add ppc64
Fairly straightforward. A couple of unusual addressing tricks. Also added the ability to write R(10) to mean R10. PPC64 uses this for a couple of large register spaces. It appears for ARM now as well, since I saw some uses of that before, although I rewrote them in our source. I could put it in for 386 and amd64 but it's not worth it. Change-Id: I3ffd7ffa62d511b95b92c3c75b9f1d621f5393b6 Reviewed-on: https://go-review.googlesource.com/5282 Reviewed-by: Russ Cox <rsc@golang.org>
This commit is contained in:
Rob Pike
parent
6acd5a65b2
commit
e559c5cce2
@ -8,7 +8,8 @@ import (
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"cmd/internal/obj"
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"cmd/internal/obj/arm"
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"cmd/internal/obj/i386" // == 386
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"cmd/internal/obj/x86" // == amd64
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"cmd/internal/obj/ppc64"
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"cmd/internal/obj/x86" // == amd64
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"fmt"
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)
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@ -26,7 +27,11 @@ type Arch struct {
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// Map of instruction names to enumeration.
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Instructions map[string]int
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// Map of register names to enumeration.
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Registers map[string]int16
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Register map[string]int16
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// Table of register prefix names. These are things like R for R(0) and SPR for SPR(268).
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RegisterPrefix map[string]bool
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// RegisterNumber converts R(10) into arm.REG_R10.
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RegisterNumber func(string, int16) (int16, bool)
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// Instructions that take one operand whose result is a destination.
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UnaryDestination map[int]bool
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// Instruction is a jump.
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@ -37,6 +42,12 @@ type Arch struct {
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Dconv func(p *obj.Prog, flag int, a *obj.Addr) string
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}
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// nilRegisterNumber is the register number function for architectures
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// that do not accept the R(N) notation. It always returns failure.
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func nilRegisterNumber(name string, n int16) (int16, bool) {
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return 0, false
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}
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var Pseudos = map[string]int{
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"DATA": obj.ADATA,
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"FUNCDATA": obj.AFUNCDATA,
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@ -60,6 +71,10 @@ func Set(GOARCH string) *Arch {
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return a
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case "arm":
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return archArm()
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case "ppc64":
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a := archPPC64()
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a.LinkArch = &ppc64.Linkppc64
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return a
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}
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return nil
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}
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@ -69,16 +84,17 @@ func jump386(word string) bool {
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}
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func arch386() *Arch {
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registers := make(map[string]int16)
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register := make(map[string]int16)
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// Create maps for easy lookup of instruction names etc.
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// TODO: Should this be done in obj for us?
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for i, s := range i386.Register {
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registers[s] = int16(i + i386.REG_AL)
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register[s] = int16(i + i386.REG_AL)
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}
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// Pseudo-registers.
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registers["SB"] = RSB
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registers["FP"] = RFP
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registers["PC"] = RPC
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register["SB"] = RSB
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register["FP"] = RFP
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register["PC"] = RPC
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// Prefixes not used on this architecture.
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instructions := make(map[string]int)
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for i, s := range i386.Anames {
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@ -162,7 +178,9 @@ func arch386() *Arch {
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return &Arch{
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LinkArch: &i386.Link386,
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Instructions: instructions,
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Registers: registers,
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Register: register,
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RegisterPrefix: nil,
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RegisterNumber: nilRegisterNumber,
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UnaryDestination: unaryDestination,
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IsJump: jump386,
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Aconv: i386.Aconv,
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@ -171,16 +189,17 @@ func arch386() *Arch {
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}
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func archAmd64() *Arch {
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registers := make(map[string]int16)
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register := make(map[string]int16)
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// Create maps for easy lookup of instruction names etc.
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// TODO: Should this be done in obj for us?
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for i, s := range x86.Register {
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registers[s] = int16(i + x86.REG_AL)
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register[s] = int16(i + x86.REG_AL)
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}
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// Pseudo-registers.
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registers["SB"] = RSB
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registers["FP"] = RFP
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registers["PC"] = RPC
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register["SB"] = RSB
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register["FP"] = RFP
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register["PC"] = RPC
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// Register prefix not used on this architecture.
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instructions := make(map[string]int)
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for i, s := range x86.Anames {
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@ -271,7 +290,9 @@ func archAmd64() *Arch {
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return &Arch{
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LinkArch: &x86.Linkamd64,
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Instructions: instructions,
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Registers: registers,
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Register: register,
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RegisterPrefix: nil,
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RegisterNumber: nilRegisterNumber,
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UnaryDestination: unaryDestination,
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IsJump: jump386,
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Aconv: x86.Aconv,
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@ -280,26 +301,30 @@ func archAmd64() *Arch {
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}
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func archArm() *Arch {
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registers := make(map[string]int16)
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register := make(map[string]int16)
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// Create maps for easy lookup of instruction names etc.
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// TODO: Should this be done in obj for us?
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// Note that there is no list of names as there is for 386 and amd64.
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// TODO: Are there aliases we need to add?
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for i := arm.REG_R0; i < arm.REG_SPSR; i++ {
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registers[arm.Rconv(i)] = int16(i)
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register[arm.Rconv(i)] = int16(i)
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}
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// Avoid unintentionally clobbering g using R10.
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delete(registers, "R10")
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registers["g"] = arm.REG_R10
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delete(register, "R10")
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register["g"] = arm.REG_R10
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for i := 0; i < 16; i++ {
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registers[fmt.Sprintf("C%d", i)] = int16(i)
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register[fmt.Sprintf("C%d", i)] = int16(i)
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}
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// Pseudo-registers.
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registers["SB"] = RSB
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registers["FP"] = RFP
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registers["PC"] = RPC
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registers["SP"] = RSP
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register["SB"] = RSB
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register["FP"] = RFP
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register["PC"] = RPC
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register["SP"] = RSP
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registerPrefix := map[string]bool{
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"F": true,
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"R": true,
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}
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instructions := make(map[string]int)
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for i, s := range arm.Anames {
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@ -318,10 +343,72 @@ func archArm() *Arch {
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return &Arch{
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LinkArch: &arm.Linkarm,
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Instructions: instructions,
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Registers: registers,
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Register: register,
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RegisterPrefix: registerPrefix,
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RegisterNumber: armRegisterNumber,
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UnaryDestination: unaryDestination,
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IsJump: jumpArm,
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Aconv: arm.Aconv,
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Dconv: arm.Dconv,
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}
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}
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func archPPC64() *Arch {
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register := make(map[string]int16)
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// Create maps for easy lookup of instruction names etc.
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// TODO: Should this be done in obj for us?
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// Note that there is no list of names as there is for 386 and amd64.
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for i := ppc64.REG_R0; i <= ppc64.REG_R31; i++ {
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register[ppc64.Rconv(i)] = int16(i)
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}
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for i := ppc64.REG_F0; i <= ppc64.REG_F31; i++ {
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register[ppc64.Rconv(i)] = int16(i)
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}
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for i := ppc64.REG_C0; i <= ppc64.REG_C7; i++ {
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// TODO: Rconv prints these as C7 but the input syntax requires CR7.
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register[fmt.Sprintf("CR%d", i-ppc64.REG_C0)] = int16(i)
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}
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for i := ppc64.REG_MSR; i <= ppc64.REG_CR; i++ {
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register[ppc64.Rconv(i)] = int16(i)
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}
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register["CR"] = ppc64.REG_CR
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register["XER"] = ppc64.REG_XER
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register["LR"] = ppc64.REG_LR
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register["CTR"] = ppc64.REG_CTR
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register["FPSCR"] = ppc64.REG_FPSCR
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register["MSR"] = ppc64.REG_MSR
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// Pseudo-registers.
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register["SB"] = RSB
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register["FP"] = RFP
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register["PC"] = RPC
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// Avoid unintentionally clobbering g using R30.
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delete(register, "R30")
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register["g"] = ppc64.REG_R30
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registerPrefix := map[string]bool{
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"CR": true,
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"F": true,
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"R": true,
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"SPR": true,
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}
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instructions := make(map[string]int)
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for i, s := range ppc64.Anames {
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instructions[s] = i
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}
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// Annoying aliases.
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instructions["BR"] = ppc64.ABR
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instructions["BL"] = ppc64.ABL
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instructions["RETURN"] = ppc64.ARETURN
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return &Arch{
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LinkArch: &ppc64.Linkppc64,
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Instructions: instructions,
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Register: register,
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RegisterPrefix: registerPrefix,
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RegisterNumber: ppc64RegisterNumber,
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UnaryDestination: nil,
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IsJump: jumpPPC64,
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Aconv: ppc64.Aconv,
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Dconv: ppc64.Dconv,
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}
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}
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@ -188,3 +188,16 @@ func parseARMCondition(cond string) (uint8, bool) {
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}
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return bits, true
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}
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func armRegisterNumber(name string, n int16) (int16, bool) {
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if n < 0 || 15 < n {
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return 0, false
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}
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switch name {
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case "R":
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return arm.REG_R0 + n, true
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case "F":
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return arm.REG_F0 + n, true
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}
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return 0, false
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}
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63
src/cmd/asm/internal/arch/ppc64.go
Normal file
63
src/cmd/asm/internal/arch/ppc64.go
Normal file
@ -0,0 +1,63 @@
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// Copyright 2015 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// This file encapsulates some of the odd characteristics of the ARM
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// instruction set, to minimize its interaction with the core of the
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// assembler.
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package arch
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import "cmd/internal/obj/ppc64"
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func jumpPPC64(word string) bool {
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switch word {
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case "BC", "BCL", "BEQ", "BGE", "BGT", "BL", "BLE", "BLT", "BNE", "BR", "BVC", "BVS", "CALL":
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return true
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}
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return false
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}
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// IsPPC64RLD reports whether the op (as defined by an ppc64.A* constant) is
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// one of the RLD-like instructions that require special handling.
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func IsPPC64RLD(op int) bool {
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switch op {
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case ppc64.ARLDC, ppc64.ARLDCCC, ppc64.ARLDCL, ppc64.ARLDCLCC,
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ppc64.ARLDCR, ppc64.ARLDCRCC, ppc64.ARLDMI, ppc64.ARLDMICC,
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ppc64.ARLWMI, ppc64.ARLWMICC, ppc64.ARLWNM, ppc64.ARLWNMCC:
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return true
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}
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return false
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}
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// IsPPC64CMP reports whether the op (as defined by an ppc64.A* constant) is
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// one of the CMP instructions that require special handling.
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func IsPPC64CMP(op int) bool {
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switch op {
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case ppc64.ACMP, ppc64.ACMPU, ppc64.ACMPW, ppc64.ACMPWU:
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return true
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}
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return false
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}
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func ppc64RegisterNumber(name string, n int16) (int16, bool) {
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switch name {
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case "CR":
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if 0 <= n && n <= 7 {
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return ppc64.REG_C0 + n, true
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}
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case "F":
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if 0 <= n && n <= 31 {
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return ppc64.REG_F0 + n, true
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}
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case "R":
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if 0 <= n && n <= 31 {
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return ppc64.REG_R0 + n, true
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}
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case "SPR":
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if 0 <= n && n <= 1024 {
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return ppc64.REG_SPR0 + n, true
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}
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}
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return 0, false
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}
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@ -13,6 +13,7 @@ import (
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"cmd/asm/internal/lex"
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"cmd/internal/obj"
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"cmd/internal/obj/arm"
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"cmd/internal/obj/ppc64"
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)
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// TODO: configure the architecture
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@ -292,23 +293,37 @@ func (p *Parser) asmFuncData(word string, operands [][]lex.Token) {
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// JMP 3(PC)
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func (p *Parser) asmJump(op int, cond string, a []obj.Addr) {
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var target *obj.Addr
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switch len(a) {
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case 1:
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target = &a[0]
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default:
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p.errorf("wrong number of arguments to %s instruction", p.arch.Aconv(op))
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}
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prog := &obj.Prog{
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Ctxt: p.linkCtxt,
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Lineno: p.histLineNum,
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As: int16(op),
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}
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switch len(a) {
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case 1:
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target = &a[0]
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case 3:
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if p.arch.Thechar == '9' {
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target = &a[2]
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// Special 3-operand jumps.
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// First two must be constants.
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prog.From = obj.Addr{
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Type: obj.TYPE_CONST,
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Offset: p.getConstant(prog, op, &a[0]),
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}
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prog.Reg = int16(ppc64.REG_R0 + p.getConstant(prog, op, &a[1]))
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break
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}
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fallthrough
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default:
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p.errorf("wrong number of arguments to %s instruction", p.arch.Aconv(op))
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return
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}
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switch {
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case target.Type == obj.TYPE_BRANCH:
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// JMP 4(PC)
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prog.To = obj.Addr{
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Type: obj.TYPE_BRANCH,
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Offset: p.pc + 1 + target.Offset, // +1 because p.pc is incremented in link, below.
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Offset: p.pc + 1 + target.Offset, // +1 because p.pc is incremented in append, below.
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}
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case target.Type == obj.TYPE_REG:
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// JMP R1
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@ -322,6 +337,10 @@ func (p *Parser) asmJump(op int, cond string, a []obj.Addr) {
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prog.To.Type = obj.TYPE_INDIR
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case target.Type == obj.TYPE_MEM && target.Reg == 0 && target.Offset == 0:
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// JMP exit
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if target.Sym == nil {
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// Parse error left name unset.
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return
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}
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targetProg := p.labels[target.Sym.Name]
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if targetProg == nil {
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p.toPatch = append(p.toPatch, Patch{prog, target.Sym.Name})
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@ -329,8 +348,12 @@ func (p *Parser) asmJump(op int, cond string, a []obj.Addr) {
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p.branch(prog, targetProg)
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}
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case target.Type == obj.TYPE_MEM && target.Name == obj.NAME_NONE:
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// JMP 4(PC)
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// JMP 4(R0)
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prog.To = *target
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// On the ppc64, 9a encodes BR (CTR) as BR CTR. We do the same.
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if p.arch.Thechar == '9' && target.Offset == 0 {
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prog.To.Type = obj.TYPE_REG
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}
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default:
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p.errorf("cannot assemble jump %+v", target)
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}
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@ -452,6 +475,31 @@ func (p *Parser) asmInstruction(op int, cond string, a []obj.Addr) {
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default:
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p.errorf("expected offset or register for 3rd operand")
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}
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case '9':
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if arch.IsPPC64CMP(op) {
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// CMPW etc.; third argument is a CR register that goes into prog.Reg.
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prog.From = a[0]
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prog.Reg = p.getRegister(prog, op, &a[2])
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prog.To = a[1]
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break
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}
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// Arithmetic. Choices are:
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// reg reg reg
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// imm reg reg
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// reg imm reg
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// If the immediate is the middle argument, use From3.
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switch a[1].Type {
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case obj.TYPE_REG:
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prog.From = a[0]
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prog.Reg = p.getRegister(prog, op, &a[1])
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prog.To = a[2]
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case obj.TYPE_CONST:
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prog.From = a[0]
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prog.From3 = a[1]
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prog.To = a[2]
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default:
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p.errorf("invalid addressing modes for %s instruction", p.arch.Aconv(op))
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}
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default:
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p.errorf("TODO: implement three-operand instructions for this architecture")
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}
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@ -469,6 +517,14 @@ func (p *Parser) asmInstruction(op int, cond string, a []obj.Addr) {
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prog.Reg = r1
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break
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}
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if p.arch.Thechar == '9' && arch.IsPPC64RLD(op) {
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// 2nd operand is always a register.
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prog.From = a[0]
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prog.Reg = p.getRegister(prog, op, &a[1])
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prog.From3 = a[2]
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prog.To = a[3]
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break
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}
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p.errorf("can't handle %s instruction with 4 operands", p.arch.Aconv(op))
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case 6:
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// MCR and MRC on ARM
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@ -5,6 +5,7 @@
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package asm
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import (
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"os"
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"testing"
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"cmd/asm/internal/arch"
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@ -15,10 +16,10 @@ import (
|
||||
// A simple in-out test: Do we print what we parse?
|
||||
|
||||
func newParser(goarch string) *Parser {
|
||||
os.Setenv("GOOS", "linux") // obj can handle this OS for all architectures.
|
||||
architecture := arch.Set(goarch)
|
||||
ctxt := obj.Linknew(architecture.LinkArch)
|
||||
parser := NewParser(ctxt, architecture, nil)
|
||||
return parser
|
||||
return NewParser(ctxt, architecture, nil)
|
||||
}
|
||||
|
||||
func testOperandParser(t *testing.T, parser *Parser, tests []operandTest) {
|
||||
@ -34,15 +35,15 @@ func testOperandParser(t *testing.T, parser *Parser, tests []operandTest) {
|
||||
}
|
||||
|
||||
func testX86RegisterPair(t *testing.T, parser *Parser) {
|
||||
// Special case for AX:DX, which is really two operands so isn't print correcctly
|
||||
// Special case for AX:DX, which is really two operands so isn't printed correcctly
|
||||
// by Aconv, but is OK by the -S output.
|
||||
parser.start(lex.Tokenize("AX:BX)"))
|
||||
addr := obj.Addr{}
|
||||
parser.operand(&addr)
|
||||
want := obj.Addr{
|
||||
Type: obj.TYPE_REG,
|
||||
Reg: parser.arch.Registers["AX"],
|
||||
Class: int8(parser.arch.Registers["BX"]), // TODO: clean up how this is encoded in parse.go
|
||||
Reg: parser.arch.Register["AX"],
|
||||
Class: int8(parser.arch.Register["BX"]), // TODO: clean up how this is encoded in parse.go
|
||||
}
|
||||
if want != addr {
|
||||
t.Errorf("AX:DX: expected %+v got %+v", want, addr)
|
||||
@ -66,6 +67,11 @@ func TestARMOperandParser(t *testing.T) {
|
||||
testOperandParser(t, parser, armOperandTests)
|
||||
}
|
||||
|
||||
func TestPPC64OperandParser(t *testing.T) {
|
||||
parser := newParser("ppc64")
|
||||
testOperandParser(t, parser, ppc64OperandTests)
|
||||
}
|
||||
|
||||
type operandTest struct {
|
||||
input, output string
|
||||
}
|
||||
@ -251,12 +257,12 @@ var armOperandTests = []operandTest{
|
||||
{"-12(R4)", "-12(R4)"},
|
||||
{"0(PC)", "0(PC)"},
|
||||
{"1024", "1024"},
|
||||
{"12(R1)", "12(R1)"},
|
||||
{"12(R(1))", "12(R1)"},
|
||||
{"12(R13)", "12(R13)"},
|
||||
{"R0", "R0"},
|
||||
{"R0->(32-1)", "R0->31"},
|
||||
{"R0<<R1", "R0<<R1"},
|
||||
{"R0>>R1", "R0>>R1"},
|
||||
{"R0>>R(1)", "R0>>R1"},
|
||||
{"R0@>(32-1)", "R0@>31"},
|
||||
{"R1", "R1"},
|
||||
{"R11", "R11"},
|
||||
@ -268,6 +274,7 @@ var armOperandTests = []operandTest{
|
||||
{"R2", "R2"},
|
||||
{"R3", "R3"},
|
||||
{"R4", "R4"},
|
||||
{"R(4)", "R4"},
|
||||
{"R5", "R5"},
|
||||
{"R6", "R6"},
|
||||
{"R7", "R7"},
|
||||
@ -275,6 +282,7 @@ var armOperandTests = []operandTest{
|
||||
// TODO: Fix Dconv to handle these. MOVM print shows the registers.
|
||||
{"[R0,R1,g,R15]", "$33795"},
|
||||
{"[R0-R7]", "$255"},
|
||||
{"[R(0)-R(7)]", "$255"},
|
||||
{"[R0]", "$1"},
|
||||
{"[R1-R12]", "$8190"},
|
||||
{"armCAS64(SB)", "armCAS64+0(SB)"},
|
||||
@ -286,3 +294,90 @@ var armOperandTests = []operandTest{
|
||||
{"runtime·_sfloat2(SB)", "runtime._sfloat2+0(SB)"},
|
||||
{"·AddUint32(SB)", "\"\".AddUint32+0(SB)"},
|
||||
}
|
||||
|
||||
var ppc64OperandTests = []operandTest{
|
||||
{"$((1<<63)-1)", "$0x7fffffffffffffff"},
|
||||
{"$(-64*1024)", "$-65536"},
|
||||
{"$(1024 * 8)", "$8192"},
|
||||
{"$-1", "$-1"},
|
||||
{"$-24(R4)", "$-24(R4)"},
|
||||
{"$0", "$0"},
|
||||
{"$0(R1)", "$0(R1)"},
|
||||
{"$0.5", "$0.5"},
|
||||
{"$0x7000", "$28672"},
|
||||
{"$0x88888eef", "$0x88888eef"},
|
||||
{"$1", "$1"},
|
||||
{"$_main<>(SB)", "$_main<>+0(SB)"},
|
||||
{"$argframe+0(FP)", "$argframe+0(FP)"},
|
||||
{"$runtime·tlsg(SB)", "$runtime.tlsg(SB)"},
|
||||
{"$~3", "$-4"},
|
||||
{"(-288-3*8)(R1)", "-312(R1)"},
|
||||
{"(16)(R7)", "16(R7)"},
|
||||
{"(8)(g)", "8(R30)"}, // TODO: Should print 8(g)
|
||||
{"(CTR)", "0(CTR)"},
|
||||
{"(R0)", "0(R0)"},
|
||||
{"(R3)", "0(R3)"},
|
||||
{"(R4)", "0(R4)"},
|
||||
{"(R5)", "0(R5)"},
|
||||
{"-1(R4)", "-1(R4)"},
|
||||
{"-1(R5)", "-1(R5)"},
|
||||
{"6(PC)", "6(APC)"}, // TODO: Should print 6(PC).
|
||||
{"CR7", "C7"}, // TODO: Should print CR7.
|
||||
{"CTR", "CTR"},
|
||||
{"F14", "F14"},
|
||||
{"F15", "F15"},
|
||||
{"F16", "F16"},
|
||||
{"F17", "F17"},
|
||||
{"F18", "F18"},
|
||||
{"F19", "F19"},
|
||||
{"F20", "F20"},
|
||||
{"F21", "F21"},
|
||||
{"F22", "F22"},
|
||||
{"F23", "F23"},
|
||||
{"F24", "F24"},
|
||||
{"F25", "F25"},
|
||||
{"F26", "F26"},
|
||||
{"F27", "F27"},
|
||||
{"F28", "F28"},
|
||||
{"F29", "F29"},
|
||||
{"F30", "F30"},
|
||||
{"F31", "F31"},
|
||||
{"LR", "LR"},
|
||||
{"R0", "R0"},
|
||||
{"R1", "R1"},
|
||||
{"R11", "R11"},
|
||||
{"R12", "R12"},
|
||||
{"R13", "R13"},
|
||||
{"R14", "R14"},
|
||||
{"R15", "R15"},
|
||||
{"R16", "R16"},
|
||||
{"R17", "R17"},
|
||||
{"R18", "R18"},
|
||||
{"R19", "R19"},
|
||||
{"R2", "R2"},
|
||||
{"R20", "R20"},
|
||||
{"R21", "R21"},
|
||||
{"R22", "R22"},
|
||||
{"R23", "R23"},
|
||||
{"R24", "R24"},
|
||||
{"R25", "R25"},
|
||||
{"R26", "R26"},
|
||||
{"R27", "R27"},
|
||||
{"R28", "R28"},
|
||||
{"R29", "R29"},
|
||||
{"R3", "R3"},
|
||||
{"R31", "R31"},
|
||||
{"R4", "R4"},
|
||||
{"R5", "R5"},
|
||||
{"R6", "R6"},
|
||||
{"R7", "R7"},
|
||||
{"R8", "R8"},
|
||||
{"R9", "R9"},
|
||||
{"SPR(269)", "SPR(269)"},
|
||||
{"a+0(FP)", "a+0(FP)"},
|
||||
{"g", "R30"}, // TODO: Should print g.
|
||||
{"ret+8(FP)", "ret+8(FP)"},
|
||||
{"runtime·abort(SB)", "runtime.abort(SB)"},
|
||||
{"·AddUint32(SB)", "\"\".AddUint32(SB)"},
|
||||
{"·trunc(SB)", "\"\".trunc(SB)"},
|
||||
}
|
||||
|
||||
@ -226,6 +226,7 @@ func (p *Parser) parseScale(s string) int8 {
|
||||
|
||||
// operand parses a general operand and stores the result in *a.
|
||||
func (p *Parser) operand(a *obj.Addr) bool {
|
||||
// fmt.Printf("Operand: %v\n", p.input)
|
||||
if len(p.input) == 0 {
|
||||
p.errorf("empty operand: cannot happen")
|
||||
return false
|
||||
@ -250,9 +251,10 @@ func (p *Parser) operand(a *obj.Addr) bool {
|
||||
|
||||
// Symbol: sym±offset(SB)
|
||||
tok := p.next()
|
||||
if tok.ScanToken == scanner.Ident && !p.isRegister(tok.String()) {
|
||||
name := tok.String()
|
||||
if tok.ScanToken == scanner.Ident && !p.atStartOfRegister(name) {
|
||||
// We have a symbol. Parse $sym±offset(symkind)
|
||||
p.symbolReference(a, tok.String(), prefix)
|
||||
p.symbolReference(a, name, prefix)
|
||||
// fmt.Printf("SYM %s\n", p.arch.Dconv(&emptyProg, 0, a))
|
||||
if p.peek() == scanner.EOF {
|
||||
return true
|
||||
@ -270,7 +272,7 @@ func (p *Parser) operand(a *obj.Addr) bool {
|
||||
}
|
||||
|
||||
// Register: R1
|
||||
if tok.ScanToken == scanner.Ident && p.isRegister(tok.String()) {
|
||||
if tok.ScanToken == scanner.Ident && p.atStartOfRegister(name) {
|
||||
if lex.IsRegisterShift(p.peek()) {
|
||||
// ARM shifted register such as R1<<R2 or R1>>2.
|
||||
a.Type = obj.TYPE_SHIFT
|
||||
@ -280,10 +282,10 @@ func (p *Parser) operand(a *obj.Addr) bool {
|
||||
p.next()
|
||||
tok := p.next()
|
||||
name := tok.String()
|
||||
if !p.isRegister(name) {
|
||||
if !p.atStartOfRegister(name) {
|
||||
p.errorf("expected register; found %s", name)
|
||||
}
|
||||
a.Reg = p.arch.Registers[name]
|
||||
a.Reg, _ = p.registerReference(name)
|
||||
p.get(')')
|
||||
}
|
||||
} else if r1, r2, scale, ok := p.register(tok.String(), prefix); ok {
|
||||
@ -312,7 +314,7 @@ func (p *Parser) operand(a *obj.Addr) bool {
|
||||
// Could be parenthesized expression or (R).
|
||||
rname := p.next().String()
|
||||
p.back()
|
||||
haveConstant = !p.isRegister(rname)
|
||||
haveConstant = !p.atStartOfRegister(rname)
|
||||
if !haveConstant {
|
||||
p.back() // Put back the '('.
|
||||
}
|
||||
@ -368,18 +370,49 @@ func (p *Parser) operand(a *obj.Addr) bool {
|
||||
return true
|
||||
}
|
||||
|
||||
// isRegister reports whether the token is a register.
|
||||
func (p *Parser) isRegister(name string) bool {
|
||||
_, present := p.arch.Registers[name]
|
||||
return present
|
||||
// atStartOfRegister reports whether the parser is at the start of a register definition.
|
||||
func (p *Parser) atStartOfRegister(name string) bool {
|
||||
// Simple register: R10.
|
||||
_, present := p.arch.Register[name]
|
||||
if present {
|
||||
return true
|
||||
}
|
||||
// Parenthesized register: R(10).
|
||||
return p.arch.RegisterPrefix[name] && p.peek() == '('
|
||||
}
|
||||
|
||||
// register parses a register reference where there is no symbol present (as in 4(R0) not sym(SB)).
|
||||
// registerReference parses a register given either the name, R10, or a parenthesized form, SPR(10).
|
||||
func (p *Parser) registerReference(name string) (int16, bool) {
|
||||
r, present := p.arch.Register[name]
|
||||
if present {
|
||||
return r, true
|
||||
}
|
||||
if !p.arch.RegisterPrefix[name] {
|
||||
p.errorf("expected register; found %s", name)
|
||||
return 0, false
|
||||
}
|
||||
p.get('(')
|
||||
tok := p.get(scanner.Int)
|
||||
num, err := strconv.ParseInt(tok.String(), 10, 16)
|
||||
p.get(')')
|
||||
if err != nil {
|
||||
p.errorf("parsing register list: %s", err)
|
||||
return 0, false
|
||||
}
|
||||
r, ok := p.arch.RegisterNumber(name, int16(num))
|
||||
if !ok {
|
||||
p.errorf("illegal register %s(%d)", name, r)
|
||||
return 0, false
|
||||
}
|
||||
return r, true
|
||||
}
|
||||
|
||||
// register parses a full register reference where there is no symbol present (as in 4(R0) or R(10) but not sym(SB))
|
||||
// including forms involving multiple registers such as R1:R2.
|
||||
func (p *Parser) register(name string, prefix rune) (r1, r2 int16, scale int8, ok bool) {
|
||||
// R1 or R1:R2 R1,R2 or R1*scale.
|
||||
var present bool
|
||||
r1, present = p.arch.Registers[name]
|
||||
if !present {
|
||||
// R1 or R(1) R1:R2 R1,R2 or R1*scale.
|
||||
r1, ok = p.registerReference(name)
|
||||
if !ok {
|
||||
return
|
||||
}
|
||||
if prefix != 0 {
|
||||
@ -392,16 +425,18 @@ func (p *Parser) register(name string, prefix rune) (r1, r2 int16, scale int8, o
|
||||
case ':':
|
||||
if char != '6' && char != '8' {
|
||||
p.errorf("illegal register pair syntax")
|
||||
return
|
||||
}
|
||||
case ',':
|
||||
if char != '5' {
|
||||
p.errorf("illegal register pair syntax")
|
||||
return
|
||||
}
|
||||
}
|
||||
name := p.next().String()
|
||||
r2, present = p.arch.Registers[name]
|
||||
if !present {
|
||||
p.errorf("%s not a register", name)
|
||||
r2, ok = p.registerReference(name)
|
||||
if !ok {
|
||||
return
|
||||
}
|
||||
}
|
||||
if p.peek() == '*' {
|
||||
@ -415,18 +450,18 @@ func (p *Parser) register(name string, prefix rune) (r1, r2 int16, scale int8, o
|
||||
// registerShift parses an ARM shifted register reference and returns the encoded representation.
|
||||
// There is known to be a register (current token) and a shift operator (peeked token).
|
||||
func (p *Parser) registerShift(name string, prefix rune) int64 {
|
||||
if prefix != 0 {
|
||||
p.errorf("prefix %c not allowed for shifted register: $%s", prefix, name)
|
||||
}
|
||||
// R1 op R2 or r1 op constant.
|
||||
// op is:
|
||||
// "<<" == 0
|
||||
// ">>" == 1
|
||||
// "->" == 2
|
||||
// "@>" == 3
|
||||
r1, present := p.arch.Registers[name]
|
||||
if !present {
|
||||
p.errorf("shift of non-register %s", name)
|
||||
}
|
||||
if prefix != 0 {
|
||||
p.errorf("prefix %c not allowed for shifted register: $%s", prefix, name)
|
||||
r1, ok := p.registerReference(name)
|
||||
if !ok {
|
||||
return 0
|
||||
}
|
||||
var op int16
|
||||
switch p.next().ScanToken {
|
||||
@ -444,8 +479,8 @@ func (p *Parser) registerShift(name string, prefix rune) int64 {
|
||||
var count int16
|
||||
switch tok.ScanToken {
|
||||
case scanner.Ident:
|
||||
r2, present := p.arch.Registers[str]
|
||||
if !present {
|
||||
r2, ok := p.registerReference(str)
|
||||
if !ok {
|
||||
p.errorf("rhs of shift must be register or integer: %s", str)
|
||||
}
|
||||
count = (r2&15)<<8 | 1<<4
|
||||
@ -632,26 +667,19 @@ func (p *Parser) registerList(a *obj.Addr) {
|
||||
a.Offset = int64(bits)
|
||||
}
|
||||
|
||||
// register number is ARM-specific. It returns the number of the specified register.
|
||||
func (p *Parser) registerNumber(name string) uint16 {
|
||||
if !p.isRegister(name) {
|
||||
p.errorf("expected register; found %s", name)
|
||||
}
|
||||
// Register must be of the form R0 through R15.
|
||||
// On ARM, g is register 10.
|
||||
if p.arch.Thechar == '5' && name == "g" {
|
||||
return 10
|
||||
}
|
||||
if name[0] != 'R' {
|
||||
p.errorf("expected g or R0 through R15; found %s", name)
|
||||
}
|
||||
num, err := strconv.ParseUint(name[1:], 10, 8)
|
||||
if err != nil {
|
||||
p.errorf("parsing register list: %s", err)
|
||||
r, ok := p.registerReference(name)
|
||||
if !ok {
|
||||
return 0
|
||||
}
|
||||
if num > 15 {
|
||||
p.errorf("illegal register %s in register list", name)
|
||||
}
|
||||
return uint16(num)
|
||||
return uint16(r - p.arch.Register["R0"])
|
||||
}
|
||||
|
||||
// Note: There are two changes in the expression handling here
|
||||
|
||||
Loading…
Reference in New Issue
Block a user