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cmd/compile: add rules to eliminate unnecessary signed shifts
This change to the rules removes some unnecessary signed shifts that appear in the math/rand functions. Existing rules did not cover some of the signed cases. A little improvement seen in math/rand due to removing 1 of 2 instructions generated for Int31n, which is inlined quite a bit. Intn1000 46.9ns ± 0% 45.5ns ± 0% -2.99% (p=1.000 n=1+1) Int63n1000 33.5ns ± 0% 32.8ns ± 0% -2.09% (p=1.000 n=1+1) Int31n1000 32.7ns ± 0% 32.6ns ± 0% -0.31% (p=1.000 n=1+1) Float32 32.7ns ± 0% 30.3ns ± 0% -7.34% (p=1.000 n=1+1) Float64 21.7ns ± 0% 20.9ns ± 0% -3.69% (p=1.000 n=1+1) Perm3 205ns ± 0% 202ns ± 0% -1.46% (p=1.000 n=1+1) Perm30 1.71µs ± 0% 1.68µs ± 0% -1.35% (p=1.000 n=1+1) Perm30ViaShuffle 1.65µs ± 0% 1.65µs ± 0% -0.30% (p=1.000 n=1+1) ShuffleOverhead 2.83µs ± 0% 2.83µs ± 0% -0.07% (p=1.000 n=1+1) Read3 18.7ns ± 0% 16.1ns ± 0% -13.90% (p=1.000 n=1+1) Read64 126ns ± 0% 124ns ± 0% -1.59% (p=1.000 n=1+1) Read1000 1.75µs ± 0% 1.63µs ± 0% -7.08% (p=1.000 n=1+1) Change-Id: I11502dfca7d65aafc76749a8d713e9e50c24a858 Reviewed-on: https://go-review.googlesource.com/c/go/+/225917 Run-TryBot: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Cherry Zhang <cherryyz@google.com>
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@ -704,19 +704,24 @@
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(MOVBZreg (SRDconst [c] x)) && c>=56 -> (SRDconst [c] x)
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(MOVBZreg (SRDconst [c] x)) && c>=56 -> (SRDconst [c] x)
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(MOVBreg (SRDconst [c] x)) && c>56 -> (SRDconst [c] x)
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(MOVBreg (SRDconst [c] x)) && c>56 -> (SRDconst [c] x)
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(MOVBreg (SRDconst [c] x)) && c==56 -> (SRADconst [c] x)
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(MOVBreg (SRDconst [c] x)) && c==56 -> (SRADconst [c] x)
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(MOVBreg (SRADconst [c] x)) && c>=56 -> (SRADconst [c] x)
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(MOVBZreg (SRWconst [c] x)) && c>=24 -> (SRWconst [c] x)
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(MOVBZreg (SRWconst [c] x)) && c>=24 -> (SRWconst [c] x)
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(MOVBreg (SRWconst [c] x)) && c>24 -> (SRWconst [c] x)
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(MOVBreg (SRWconst [c] x)) && c>24 -> (SRWconst [c] x)
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(MOVBreg (SRWconst [c] x)) && c==24 -> (SRAWconst [c] x)
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(MOVBreg (SRWconst [c] x)) && c==24 -> (SRAWconst [c] x)
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(MOVBreg (SRAWconst [c] x)) && c>=24 -> (SRAWconst [c] x)
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(MOVHZreg (SRDconst [c] x)) && c>=48 -> (SRDconst [c] x)
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(MOVHZreg (SRDconst [c] x)) && c>=48 -> (SRDconst [c] x)
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(MOVHreg (SRDconst [c] x)) && c>48 -> (SRDconst [c] x)
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(MOVHreg (SRDconst [c] x)) && c>48 -> (SRDconst [c] x)
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(MOVHreg (SRDconst [c] x)) && c==48 -> (SRADconst [c] x)
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(MOVHreg (SRDconst [c] x)) && c==48 -> (SRADconst [c] x)
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(MOVHreg (SRADconst [c] x)) && c>=48 -> (SRADconst [c] x)
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(MOVHZreg (SRWconst [c] x)) && c>=16 -> (SRWconst [c] x)
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(MOVHZreg (SRWconst [c] x)) && c>=16 -> (SRWconst [c] x)
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(MOVHreg (SRWconst [c] x)) && c>16 -> (SRWconst [c] x)
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(MOVHreg (SRWconst [c] x)) && c>16 -> (SRWconst [c] x)
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(MOVHreg (SRAWconst [c] x)) && c>=16 -> (SRAWconst [c] x)
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(MOVHreg (SRWconst [c] x)) && c==16 -> (SRAWconst [c] x)
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(MOVHreg (SRWconst [c] x)) && c==16 -> (SRAWconst [c] x)
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(MOVWZreg (SRDconst [c] x)) && c>=32 -> (SRDconst [c] x)
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(MOVWZreg (SRDconst [c] x)) && c>=32 -> (SRDconst [c] x)
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(MOVWreg (SRDconst [c] x)) && c>32 -> (SRDconst [c] x)
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(MOVWreg (SRDconst [c] x)) && c>32 -> (SRDconst [c] x)
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(MOVWreg (SRADconst [c] x)) && c>=32 -> (SRADconst [c] x)
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(MOVWreg (SRDconst [c] x)) && c==32 -> (SRADconst [c] x)
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(MOVWreg (SRDconst [c] x)) && c==32 -> (SRADconst [c] x)
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// Various redundant zero/sign extension combinations.
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// Various redundant zero/sign extension combinations.
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@ -6427,6 +6427,23 @@ func rewriteValuePPC64_OpPPC64MOVBreg(v *Value) bool {
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v.AddArg(x)
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v.AddArg(x)
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return true
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return true
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}
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}
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// match: (MOVBreg (SRADconst [c] x))
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// cond: c>=56
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// result: (SRADconst [c] x)
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for {
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if v_0.Op != OpPPC64SRADconst {
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break
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}
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c := v_0.AuxInt
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x := v_0.Args[0]
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if !(c >= 56) {
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break
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}
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v.reset(OpPPC64SRADconst)
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v.AuxInt = c
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v.AddArg(x)
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return true
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}
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// match: (MOVBreg (SRWconst [c] x))
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// match: (MOVBreg (SRWconst [c] x))
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// cond: c>24
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// cond: c>24
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// result: (SRWconst [c] x)
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// result: (SRWconst [c] x)
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@ -6461,6 +6478,23 @@ func rewriteValuePPC64_OpPPC64MOVBreg(v *Value) bool {
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v.AddArg(x)
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v.AddArg(x)
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return true
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return true
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}
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}
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// match: (MOVBreg (SRAWconst [c] x))
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// cond: c>=24
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// result: (SRAWconst [c] x)
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for {
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if v_0.Op != OpPPC64SRAWconst {
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break
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}
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c := v_0.AuxInt
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x := v_0.Args[0]
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if !(c >= 24) {
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break
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}
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v.reset(OpPPC64SRAWconst)
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v.AuxInt = c
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v.AddArg(x)
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return true
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}
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// match: (MOVBreg y:(MOVBreg _))
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// match: (MOVBreg y:(MOVBreg _))
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// result: y
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// result: y
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for {
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for {
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@ -8487,6 +8521,23 @@ func rewriteValuePPC64_OpPPC64MOVHreg(v *Value) bool {
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v.AddArg(x)
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v.AddArg(x)
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return true
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return true
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}
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}
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// match: (MOVHreg (SRADconst [c] x))
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// cond: c>=48
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// result: (SRADconst [c] x)
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for {
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if v_0.Op != OpPPC64SRADconst {
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break
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}
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c := v_0.AuxInt
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x := v_0.Args[0]
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if !(c >= 48) {
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break
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}
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v.reset(OpPPC64SRADconst)
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v.AuxInt = c
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v.AddArg(x)
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return true
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}
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// match: (MOVHreg (SRWconst [c] x))
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// match: (MOVHreg (SRWconst [c] x))
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// cond: c>16
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// cond: c>16
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// result: (SRWconst [c] x)
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// result: (SRWconst [c] x)
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@ -8504,6 +8555,23 @@ func rewriteValuePPC64_OpPPC64MOVHreg(v *Value) bool {
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v.AddArg(x)
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v.AddArg(x)
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return true
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return true
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}
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}
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// match: (MOVHreg (SRAWconst [c] x))
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// cond: c>=16
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// result: (SRAWconst [c] x)
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for {
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if v_0.Op != OpPPC64SRAWconst {
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break
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}
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c := v_0.AuxInt
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x := v_0.Args[0]
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if !(c >= 16) {
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break
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}
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v.reset(OpPPC64SRAWconst)
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v.AuxInt = c
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v.AddArg(x)
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return true
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}
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// match: (MOVHreg (SRWconst [c] x))
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// match: (MOVHreg (SRWconst [c] x))
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// cond: c==16
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// cond: c==16
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// result: (SRAWconst [c] x)
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// result: (SRAWconst [c] x)
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@ -9648,6 +9716,23 @@ func rewriteValuePPC64_OpPPC64MOVWreg(v *Value) bool {
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v.AddArg(x)
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v.AddArg(x)
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return true
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return true
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}
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}
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// match: (MOVWreg (SRADconst [c] x))
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// cond: c>=32
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// result: (SRADconst [c] x)
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for {
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if v_0.Op != OpPPC64SRADconst {
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break
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}
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c := v_0.AuxInt
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x := v_0.Args[0]
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if !(c >= 32) {
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break
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}
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v.reset(OpPPC64SRADconst)
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v.AuxInt = c
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v.AddArg(x)
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return true
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}
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// match: (MOVWreg (SRDconst [c] x))
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// match: (MOVWreg (SRDconst [c] x))
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// cond: c==32
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// cond: c==32
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// result: (SRADconst [c] x)
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// result: (SRADconst [c] x)
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@ -125,3 +125,26 @@ func lshGuarded64(v int64, s uint) int64 {
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}
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}
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panic("shift too large")
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panic("shift too large")
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}
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}
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func checkWidenAfterShift(v int64, u uint64) (int64, uint64) {
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// ppc64le:-".*MOVW"
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f := int32(v>>32)
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// ppc64le:".*MOVW"
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f += int32(v>>31)
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// ppc64le:-".*MOVH"
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g := int16(v>>48)
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// ppc64le:".*MOVH"
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g += int16(v>>30)
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// ppc64le:-".*MOVH"
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g += int16(f>>16)
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// ppc64le:-".*MOVB"
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h := int8(v>>56)
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// ppc64le:".*MOVB"
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h += int8(v>>28)
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// ppc64le:-".*MOVB"
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h += int8(f>>24)
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// ppc64le:".*MOVB"
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h += int8(f>>16)
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return int64(h),uint64(g)
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}
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