diff --git a/src/internal/cpu/cpu.go b/src/internal/cpu/cpu.go index f326b063321..84df6472eb6 100644 --- a/src/internal/cpu/cpu.go +++ b/src/internal/cpu/cpu.go @@ -134,6 +134,14 @@ type s390x struct { _ CacheLinePad } +var MIPS64X mips64x + +type mips64x struct { + _ CacheLinePad + HasMSA bool // MIPS SIMD architecture + _ CacheLinePad +} + // Initialize examines the processor and sets the relevant variables above. // This is called by the runtime package early in program initialization, // before normal init functions are run. env is set by runtime if the OS supports diff --git a/src/internal/cpu/cpu_mips64.go b/src/internal/cpu/cpu_mips64.go deleted file mode 100644 index 0f821e44e77..00000000000 --- a/src/internal/cpu/cpu_mips64.go +++ /dev/null @@ -1,7 +0,0 @@ -// Copyright 2017 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -package cpu - -const CacheLinePadSize = 32 diff --git a/src/internal/cpu/cpu_mips64le.go b/src/internal/cpu/cpu_mips64le.go deleted file mode 100644 index 0f821e44e77..00000000000 --- a/src/internal/cpu/cpu_mips64le.go +++ /dev/null @@ -1,7 +0,0 @@ -// Copyright 2017 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -package cpu - -const CacheLinePadSize = 32 diff --git a/src/internal/cpu/cpu_mips64x.go b/src/internal/cpu/cpu_mips64x.go new file mode 100644 index 00000000000..9b0a824ee89 --- /dev/null +++ b/src/internal/cpu/cpu_mips64x.go @@ -0,0 +1,32 @@ +// Copyright 2019 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +// +build mips64 mips64le + +package cpu + +const CacheLinePadSize = 32 + +// These are initialized by archauxv in runtime/os_linux_mips64x.go. +// These should not be changed after they are initialized. +var HWCap uint + +// HWCAP bits. These are exposed by the Linux kernel 5.4. +const ( + // CPU features + hwcap_MIPS_MSA = 1 << 1 +) + +func doinit() { + options = []option{ + {Name: "msa", Feature: &MIPS64X.HasMSA}, + } + + // HWCAP feature bits + MIPS64X.HasMSA = isSet(HWCap, hwcap_MIPS_MSA) +} + +func isSet(hwc uint, value uint) bool { + return hwc&value != 0 +} diff --git a/src/internal/cpu/cpu_no_init.go b/src/internal/cpu/cpu_no_init.go index d4b2be8cf4f..fb381e1ce2d 100644 --- a/src/internal/cpu/cpu_no_init.go +++ b/src/internal/cpu/cpu_no_init.go @@ -9,6 +9,8 @@ // +build !ppc64 // +build !ppc64le // +build !s390x +// +build !mips64 +// +build !mips64le package cpu diff --git a/src/runtime/os_linux_mips64x.go b/src/runtime/os_linux_mips64x.go index 464a26a8a46..4ff66f9538a 100644 --- a/src/runtime/os_linux_mips64x.go +++ b/src/runtime/os_linux_mips64x.go @@ -7,7 +7,13 @@ package runtime +import "internal/cpu" + func archauxv(tag, val uintptr) { + switch tag { + case _AT_HWCAP: + cpu.HWCap = uint(val) + } } func osArchInit() {}