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cmd/internal/obj/riscv: implement RV64I integer computational instructions
Add support for assembling RV64I integer computational instructions. Based on the riscv-go port. Updates #27532 Integer Computational Instructions (RV64I) Change-Id: I1a082b3901c997da309d737d081f57ea2821bc62 Reviewed-on: https://go-review.googlesource.com/c/go/+/196838 Reviewed-by: Cherry Zhang <cherryyz@google.com> Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org>
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src/cmd/asm/internal/asm/testdata/riscvenc.s
vendored
11
src/cmd/asm/internal/asm/testdata/riscvenc.s
vendored
@ -95,6 +95,17 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
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SB $0, X5, X6 // 23005300
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SB $0, X5, X6 // 23005300
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SB $4, X5, X6 // 23025300
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SB $4, X5, X6 // 23025300
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// 5.2: Integer Computational Instructions (RV64I)
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ADDIW $1, X5, X6 // 1b831200
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SLLIW $1, X5, X6 // 1b931200
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SRLIW $1, X5, X6 // 1bd31200
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SRAIW $1, X5, X6 // 1bd31240
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ADDW X5, X6, X7 // bb035300
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SLLW X5, X6, X7 // bb135300
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SRLW X5, X6, X7 // bb535300
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SUBW X5, X6, X7 // bb035340
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SRAW X5, X6, X7 // bb535340
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// 5.3: Load and Store Instructions (RV64I)
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// 5.3: Load and Store Instructions (RV64I)
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LD $0, X5, X6 // 03b30200
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LD $0, X5, X6 // 03b30200
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LD $4, X5, X6 // 03b34200
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LD $4, X5, X6 // 03b34200
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@ -401,6 +401,17 @@ var encodingForAs = [ALAST & obj.AMask]encoding{
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ASH & obj.AMask: sIEncoding,
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ASH & obj.AMask: sIEncoding,
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ASB & obj.AMask: sIEncoding,
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ASB & obj.AMask: sIEncoding,
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// 5.2: Integer Computational Instructions (RV64I)
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AADDIW & obj.AMask: iIEncoding,
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ASLLIW & obj.AMask: iIEncoding,
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ASRLIW & obj.AMask: iIEncoding,
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ASRAIW & obj.AMask: iIEncoding,
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AADDW & obj.AMask: rIIIEncoding,
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ASLLW & obj.AMask: rIIIEncoding,
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ASRLW & obj.AMask: rIIIEncoding,
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ASUBW & obj.AMask: rIIIEncoding,
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ASRAW & obj.AMask: rIIIEncoding,
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// 5.3: Load and Store Instructions (RV64I)
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// 5.3: Load and Store Instructions (RV64I)
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ALD & obj.AMask: iIEncoding,
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ALD & obj.AMask: iIEncoding,
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ASD & obj.AMask: sIEncoding,
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ASD & obj.AMask: sIEncoding,
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