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cmd/internal/obj/riscv: implement RV64I integer computational instructions

Add support for assembling RV64I integer computational instructions.

Based on the riscv-go port.

Updates #27532

Integer Computational Instructions (RV64I)

Change-Id: I1a082b3901c997da309d737d081f57ea2821bc62
Reviewed-on: https://go-review.googlesource.com/c/go/+/196838
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
This commit is contained in:
Joel Sing 2019-09-19 00:59:26 +10:00
parent ced2454220
commit e29d276d55
2 changed files with 22 additions and 0 deletions

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@ -95,6 +95,17 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
SB $0, X5, X6 // 23005300 SB $0, X5, X6 // 23005300
SB $4, X5, X6 // 23025300 SB $4, X5, X6 // 23025300
// 5.2: Integer Computational Instructions (RV64I)
ADDIW $1, X5, X6 // 1b831200
SLLIW $1, X5, X6 // 1b931200
SRLIW $1, X5, X6 // 1bd31200
SRAIW $1, X5, X6 // 1bd31240
ADDW X5, X6, X7 // bb035300
SLLW X5, X6, X7 // bb135300
SRLW X5, X6, X7 // bb535300
SUBW X5, X6, X7 // bb035340
SRAW X5, X6, X7 // bb535340
// 5.3: Load and Store Instructions (RV64I) // 5.3: Load and Store Instructions (RV64I)
LD $0, X5, X6 // 03b30200 LD $0, X5, X6 // 03b30200
LD $4, X5, X6 // 03b34200 LD $4, X5, X6 // 03b34200

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@ -401,6 +401,17 @@ var encodingForAs = [ALAST & obj.AMask]encoding{
ASH & obj.AMask: sIEncoding, ASH & obj.AMask: sIEncoding,
ASB & obj.AMask: sIEncoding, ASB & obj.AMask: sIEncoding,
// 5.2: Integer Computational Instructions (RV64I)
AADDIW & obj.AMask: iIEncoding,
ASLLIW & obj.AMask: iIEncoding,
ASRLIW & obj.AMask: iIEncoding,
ASRAIW & obj.AMask: iIEncoding,
AADDW & obj.AMask: rIIIEncoding,
ASLLW & obj.AMask: rIIIEncoding,
ASRLW & obj.AMask: rIIIEncoding,
ASUBW & obj.AMask: rIIIEncoding,
ASRAW & obj.AMask: rIIIEncoding,
// 5.3: Load and Store Instructions (RV64I) // 5.3: Load and Store Instructions (RV64I)
ALD & obj.AMask: iIEncoding, ALD & obj.AMask: iIEncoding,
ASD & obj.AMask: sIEncoding, ASD & obj.AMask: sIEncoding,