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cmd/compile: adopt strong aux typing for some s390x rules
Convert some optimizations rules to strongly-typed versions. Similar to CL 230338, this CL only converts rules that need no additional changes (i.e: only need to change '->' to '=>'). This CL covers the rules from line 800 - 1219. Passes toolstash-check Change-Id: I94181a809fa38918b78301f1c0c680b7a8ab552f Reviewed-on: https://go-review.googlesource.com/c/go/+/230738 Reviewed-by: Michael Munday <mike.munday@ibm.com> Run-TryBot: Michael Munday <mike.munday@ibm.com> TryBot-Result: Gobot Gobot <gobot@golang.org>
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@ -800,12 +800,12 @@
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(LGDR (LDGR x)) => x
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// Don't extend before storing
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(MOVWstore [off] {sym} ptr (MOVWreg x) mem) -> (MOVWstore [off] {sym} ptr x mem)
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(MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem)
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(MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem)
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(MOVWstore [off] {sym} ptr (MOVWZreg x) mem) -> (MOVWstore [off] {sym} ptr x mem)
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(MOVHstore [off] {sym} ptr (MOVHZreg x) mem) -> (MOVHstore [off] {sym} ptr x mem)
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(MOVBstore [off] {sym} ptr (MOVBZreg x) mem) -> (MOVBstore [off] {sym} ptr x mem)
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(MOVWstore [off] {sym} ptr (MOVWreg x) mem) => (MOVWstore [off] {sym} ptr x mem)
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(MOVHstore [off] {sym} ptr (MOVHreg x) mem) => (MOVHstore [off] {sym} ptr x mem)
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(MOVBstore [off] {sym} ptr (MOVBreg x) mem) => (MOVBstore [off] {sym} ptr x mem)
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(MOVWstore [off] {sym} ptr (MOVWZreg x) mem) => (MOVWstore [off] {sym} ptr x mem)
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(MOVHstore [off] {sym} ptr (MOVHZreg x) mem) => (MOVHstore [off] {sym} ptr x mem)
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(MOVBstore [off] {sym} ptr (MOVBZreg x) mem) => (MOVBstore [off] {sym} ptr x mem)
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// Fold constants into memory operations.
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// Note that this is not always a good idea because if not all the uses of
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@ -957,22 +957,22 @@
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(FMOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) && is32Bit(off1+off2) && canMergeSym(sym1, sym2) ->
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(FMOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem)
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(MOVBZload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (MOVBZloadidx [off] {sym} ptr idx mem)
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(MOVBload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (MOVBloadidx [off] {sym} ptr idx mem)
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(MOVHZload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (MOVHZloadidx [off] {sym} ptr idx mem)
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(MOVHload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (MOVHloadidx [off] {sym} ptr idx mem)
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(MOVWZload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (MOVWZloadidx [off] {sym} ptr idx mem)
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(MOVWload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (MOVWloadidx [off] {sym} ptr idx mem)
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(MOVDload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (MOVDloadidx [off] {sym} ptr idx mem)
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(FMOVSload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (FMOVSloadidx [off] {sym} ptr idx mem)
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(FMOVDload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB -> (FMOVDloadidx [off] {sym} ptr idx mem)
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(MOVBZload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (MOVBZloadidx [off] {sym} ptr idx mem)
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(MOVBload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (MOVBloadidx [off] {sym} ptr idx mem)
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(MOVHZload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (MOVHZloadidx [off] {sym} ptr idx mem)
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(MOVHload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (MOVHloadidx [off] {sym} ptr idx mem)
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(MOVWZload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (MOVWZloadidx [off] {sym} ptr idx mem)
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(MOVWload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (MOVWloadidx [off] {sym} ptr idx mem)
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(MOVDload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (MOVDloadidx [off] {sym} ptr idx mem)
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(FMOVSload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (FMOVSloadidx [off] {sym} ptr idx mem)
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(FMOVDload [off] {sym} (ADD ptr idx) mem) && ptr.Op != OpSB => (FMOVDloadidx [off] {sym} ptr idx mem)
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(MOVBstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB -> (MOVBstoreidx [off] {sym} ptr idx val mem)
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(MOVHstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB -> (MOVHstoreidx [off] {sym} ptr idx val mem)
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(MOVWstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB -> (MOVWstoreidx [off] {sym} ptr idx val mem)
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(MOVDstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB -> (MOVDstoreidx [off] {sym} ptr idx val mem)
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(FMOVSstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB -> (FMOVSstoreidx [off] {sym} ptr idx val mem)
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(FMOVDstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB -> (FMOVDstoreidx [off] {sym} ptr idx val mem)
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(MOVBstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB => (MOVBstoreidx [off] {sym} ptr idx val mem)
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(MOVHstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB => (MOVHstoreidx [off] {sym} ptr idx val mem)
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(MOVWstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB => (MOVWstoreidx [off] {sym} ptr idx val mem)
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(MOVDstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB => (MOVDstoreidx [off] {sym} ptr idx val mem)
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(FMOVSstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB => (FMOVSstoreidx [off] {sym} ptr idx val mem)
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(FMOVDstore [off] {sym} (ADD ptr idx) val mem) && ptr.Op != OpSB => (FMOVDstoreidx [off] {sym} ptr idx val mem)
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// combine ADD into indexed loads and stores
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(MOVBZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) && is20Bit(c+d) -> (MOVBZloadidx [c+d] {sym} ptr idx mem)
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@ -1022,28 +1022,28 @@
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(CMPconst (MOVDconst [x]) [y]) && x==y -> (FlagEQ)
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(CMPconst (MOVDconst [x]) [y]) && x<y -> (FlagLT)
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(CMPconst (MOVDconst [x]) [y]) && x>y -> (FlagGT)
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(CMPUconst (MOVDconst [x]) [y]) && uint64(x)==uint64(y) -> (FlagEQ)
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(CMPUconst (MOVDconst [x]) [y]) && uint64(x)<uint64(y) -> (FlagLT)
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(CMPUconst (MOVDconst [x]) [y]) && uint64(x)>uint64(y) -> (FlagGT)
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(CMPUconst (MOVDconst [x]) [y]) && uint64(x)==uint64(y) => (FlagEQ)
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(CMPUconst (MOVDconst [x]) [y]) && uint64(x)<uint64(y) => (FlagLT)
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(CMPUconst (MOVDconst [x]) [y]) && uint64(x)>uint64(y) => (FlagGT)
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(CMPWconst (MOVDconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ)
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(CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) -> (FlagLT)
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(CMPWconst (MOVDconst [x]) [y]) && int32(x)>int32(y) -> (FlagGT)
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(CMPWUconst (MOVDconst [x]) [y]) && uint32(x)==uint32(y) -> (FlagEQ)
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(CMPWUconst (MOVDconst [x]) [y]) && uint32(x)<uint32(y) -> (FlagLT)
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(CMPWUconst (MOVDconst [x]) [y]) && uint32(x)>uint32(y) -> (FlagGT)
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(CMPWconst (MOVDconst [x]) [y]) && int32(x)==int32(y) => (FlagEQ)
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(CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) => (FlagLT)
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(CMPWconst (MOVDconst [x]) [y]) && int32(x)>int32(y) => (FlagGT)
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(CMPWUconst (MOVDconst [x]) [y]) && uint32(x)==uint32(y) => (FlagEQ)
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(CMPWUconst (MOVDconst [x]) [y]) && uint32(x)<uint32(y) => (FlagLT)
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(CMPWUconst (MOVDconst [x]) [y]) && uint32(x)>uint32(y) => (FlagGT)
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(CMP(W|WU)const (MOVBZreg _) [c]) && 0xff < c -> (FlagLT)
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(CMP(W|WU)const (MOVHZreg _) [c]) && 0xffff < c -> (FlagLT)
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(CMP(W|WU)const (MOVBZreg _) [c]) && 0xff < c => (FlagLT)
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(CMP(W|WU)const (MOVHZreg _) [c]) && 0xffff < c => (FlagLT)
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(CMPconst (SRDconst _ [c]) [n]) && c > 0 && n < 0 -> (FlagGT)
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(CMPWconst (SRWconst _ [c]) [n]) && c > 0 && n < 0 -> (FlagGT)
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(CMPconst (SRDconst _ [c]) [n]) && c > 0 && n < 0 => (FlagGT)
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(CMPWconst (SRWconst _ [c]) [n]) && c > 0 && n < 0 => (FlagGT)
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(CMPUconst (SRDconst _ [c]) [n]) && c > 0 && c < 64 && (1<<uint(64-c)) <= uint64(n) -> (FlagLT)
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(CMPWUconst (SRWconst _ [c]) [n]) && c > 0 && c < 32 && (1<<uint(32-c)) <= uint32(n) -> (FlagLT)
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(CMPUconst (SRDconst _ [c]) [n]) && c > 0 && c < 64 && (1<<uint(64-c)) <= uint64(n) => (FlagLT)
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(CMPWUconst (SRWconst _ [c]) [n]) && c > 0 && c < 32 && (1<<uint(32-c)) <= uint32(n) => (FlagLT)
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(CMPWconst (ANDWconst _ [m]) [n]) && int32(m) >= 0 && int32(m) < int32(n) -> (FlagLT)
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(CMPWUconst (ANDWconst _ [m]) [n]) && uint32(m) < uint32(n) -> (FlagLT)
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(CMPWconst (ANDWconst _ [m]) [n]) && int32(m) >= 0 && int32(m) < int32(n) => (FlagLT)
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(CMPWUconst (ANDWconst _ [m]) [n]) && uint32(m) < uint32(n) => (FlagLT)
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// Constant compare-and-branch with immediate.
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(CGIJ {c} (MOVDconst [x]) [y] yes no) && c&s390x.Equal != 0 && int64(x) == int64(y) => (First yes no)
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@ -1082,18 +1082,18 @@
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// Convert 64-bit comparisons to 32-bit comparisons and signed comparisons
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// to unsigned comparisons.
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// Helps simplify constant comparison detection.
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(CM(P|PU)const (MOV(W|WZ)reg x) [c]) -> (CMP(W|WU)const x [c])
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(CM(P|P|PU|PU)const x:(MOV(H|HZ|H|HZ)reg _) [c]) -> (CMP(W|W|WU|WU)const x [c])
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(CM(P|P|PU|PU)const x:(MOV(B|BZ|B|BZ)reg _) [c]) -> (CMP(W|W|WU|WU)const x [c])
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(CMPconst (MOV(WZ|W)reg x:(ANDWconst [m] _)) [c]) && int32(m) >= 0 && c >= 0 -> (CMPWUconst x [c])
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(CMPUconst (MOV(WZ|W)reg x:(ANDWconst [m] _)) [c]) && int32(m) >= 0 -> (CMPWUconst x [c])
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(CMPconst x:(SRDconst _ [c]) [n]) && c > 0 && n >= 0 -> (CMPUconst x [n])
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(CMPWconst x:(SRWconst _ [c]) [n]) && c > 0 && n >= 0 -> (CMPWUconst x [n])
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(CM(P|PU)const (MOV(W|WZ)reg x) [c]) => (CMP(W|WU)const x [c])
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(CM(P|P|PU|PU)const x:(MOV(H|HZ|H|HZ)reg _) [c]) => (CMP(W|W|WU|WU)const x [c])
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(CM(P|P|PU|PU)const x:(MOV(B|BZ|B|BZ)reg _) [c]) => (CMP(W|W|WU|WU)const x [c])
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(CMPconst (MOV(WZ|W)reg x:(ANDWconst [m] _)) [c]) && int32(m) >= 0 && c >= 0 => (CMPWUconst x [c])
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(CMPUconst (MOV(WZ|W)reg x:(ANDWconst [m] _)) [c]) && int32(m) >= 0 => (CMPWUconst x [c])
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(CMPconst x:(SRDconst _ [c]) [n]) && c > 0 && n >= 0 => (CMPUconst x [n])
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(CMPWconst x:(SRWconst _ [c]) [n]) && c > 0 && n >= 0 => (CMPWUconst x [n])
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// Absorb sign and zero extensions into 32-bit comparisons.
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(CMP(W|W|WU|WU) x (MOV(W|WZ|W|WZ)reg y)) -> (CMP(W|W|WU|WU) x y)
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(CMP(W|W|WU|WU) (MOV(W|WZ|W|WZ)reg x) y) -> (CMP(W|W|WU|WU) x y)
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(CMP(W|W|WU|WU)const (MOV(W|WZ|W|WZ)reg x) [c]) -> (CMP(W|W|WU|WU)const x [c])
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(CMP(W|W|WU|WU) x (MOV(W|WZ|W|WZ)reg y)) => (CMP(W|W|WU|WU) x y)
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(CMP(W|W|WU|WU) (MOV(W|WZ|W|WZ)reg x) y) => (CMP(W|W|WU|WU) x y)
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(CMP(W|W|WU|WU)const (MOV(W|WZ|W|WZ)reg x) [c]) => (CMP(W|W|WU|WU)const x [c])
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// Absorb flag constants into branches.
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(BRC {c} (FlagEQ) yes no) && c&s390x.Equal != 0 => (First yes no)
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@ -1118,23 +1118,23 @@
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(LOCGR {c} x _ (FlagOV)) && c&s390x.Unordered == 0 => x
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// Remove redundant *const ops
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(ADDconst [0] x) -> x
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(ADDWconst [c] x) && int32(c)==0 -> x
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(SUBconst [0] x) -> x
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(SUBWconst [c] x) && int32(c) == 0 -> x
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(ANDconst [0] _) -> (MOVDconst [0])
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(ANDWconst [c] _) && int32(c)==0 -> (MOVDconst [0])
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(ANDconst [-1] x) -> x
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(ANDWconst [c] x) && int32(c)==-1 -> x
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(ORconst [0] x) -> x
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(ORWconst [c] x) && int32(c)==0 -> x
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(ORconst [-1] _) -> (MOVDconst [-1])
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(ORWconst [c] _) && int32(c)==-1 -> (MOVDconst [-1])
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(XORconst [0] x) -> x
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(XORWconst [c] x) && int32(c)==0 -> x
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(ADDconst [0] x) => x
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(ADDWconst [c] x) && int32(c)==0 => x
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(SUBconst [0] x) => x
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(SUBWconst [c] x) && int32(c) == 0 => x
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(ANDconst [0] _) => (MOVDconst [0])
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(ANDWconst [c] _) && int32(c)==0 => (MOVDconst [0])
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(ANDconst [-1] x) => x
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(ANDWconst [c] x) && int32(c)==-1 => x
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(ORconst [0] x) => x
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(ORWconst [c] x) && int32(c)==0 => x
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(ORconst [-1] _) => (MOVDconst [-1])
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(ORWconst [c] _) && int32(c)==-1 => (MOVDconst [-1])
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(XORconst [0] x) => x
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(XORWconst [c] x) && int32(c)==0 => x
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// Convert constant subtracts to constant adds.
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(SUBconst [c] x) && c != -(1<<31) -> (ADDconst [-c] x)
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(SUBconst [c] x) && c != -(1<<31) => (ADDconst [-c] x)
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(SUBWconst [c] x) -> (ADDWconst [int64(int32(-c))] x)
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// generic constant folding
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@ -1145,37 +1145,37 @@
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(ADDWconst [c] (ADDWconst [d] x)) -> (ADDWconst [int64(int32(c+d))] x)
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(SUBconst (MOVDconst [d]) [c]) -> (MOVDconst [d-c])
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(SUBconst (SUBconst x [d]) [c]) && is32Bit(-c-d) -> (ADDconst [-c-d] x)
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(SRADconst [c] (MOVDconst [d])) -> (MOVDconst [d>>uint64(c)])
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(SRAWconst [c] (MOVDconst [d])) -> (MOVDconst [int64(int32(d))>>uint64(c)])
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(NEG (MOVDconst [c])) -> (MOVDconst [-c])
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(NEGW (MOVDconst [c])) -> (MOVDconst [int64(int32(-c))])
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(SRADconst [c] (MOVDconst [d])) => (MOVDconst [d>>uint64(c)])
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(SRAWconst [c] (MOVDconst [d])) => (MOVDconst [int64(int32(d))>>uint64(c)])
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(NEG (MOVDconst [c])) => (MOVDconst [-c])
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(NEGW (MOVDconst [c])) => (MOVDconst [int64(int32(-c))])
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(MULLDconst [c] (MOVDconst [d])) -> (MOVDconst [c*d])
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(MULLWconst [c] (MOVDconst [d])) -> (MOVDconst [int64(int32(c*d))])
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(AND (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c&d])
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(ANDconst [c] (MOVDconst [d])) -> (MOVDconst [c&d])
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(AND (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [c&d])
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(ANDconst [c] (MOVDconst [d])) => (MOVDconst [c&d])
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(ANDWconst [c] (MOVDconst [d])) -> (MOVDconst [c&d])
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(OR (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c|d])
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(ORconst [c] (MOVDconst [d])) -> (MOVDconst [c|d])
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(OR (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [c|d])
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(ORconst [c] (MOVDconst [d])) => (MOVDconst [c|d])
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(ORWconst [c] (MOVDconst [d])) -> (MOVDconst [c|d])
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(XOR (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c^d])
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(XORconst [c] (MOVDconst [d])) -> (MOVDconst [c^d])
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(XOR (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [c^d])
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(XORconst [c] (MOVDconst [d])) => (MOVDconst [c^d])
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(XORWconst [c] (MOVDconst [d])) -> (MOVDconst [c^d])
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(LoweredRound32F x:(FMOVSconst)) -> x
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(LoweredRound64F x:(FMOVDconst)) -> x
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(LoweredRound32F x:(FMOVSconst)) => x
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(LoweredRound64F x:(FMOVDconst)) => x
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// generic simplifications
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// TODO: more of this
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(ADD x (NEG y)) -> (SUB x y)
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(ADDW x (NEGW y)) -> (SUBW x y)
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(SUB x x) -> (MOVDconst [0])
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(SUBW x x) -> (MOVDconst [0])
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(AND x x) -> x
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(ANDW x x) -> x
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(OR x x) -> x
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(ORW x x) -> x
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(XOR x x) -> (MOVDconst [0])
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(XORW x x) -> (MOVDconst [0])
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(NEG (ADDconst [c] (NEG x))) && c != -(1<<31) -> (ADDconst [-c] x)
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(ADD x (NEG y)) => (SUB x y)
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(ADDW x (NEGW y)) => (SUBW x y)
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(SUB x x) => (MOVDconst [0])
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(SUBW x x) => (MOVDconst [0])
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(AND x x) => x
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(ANDW x x) => x
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(OR x x) => x
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(ORW x x) => x
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(XOR x x) => (MOVDconst [0])
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(XORW x x) => (MOVDconst [0])
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(NEG (ADDconst [c] (NEG x))) && c != -(1<<31) => (ADDconst [-c] x)
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(MOVBZreg (ANDWconst [m] x)) -> (MOVWZreg (ANDWconst <typ.UInt32> [int64( uint8(m))] x))
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(MOVHZreg (ANDWconst [m] x)) -> (MOVWZreg (ANDWconst <typ.UInt32> [int64(uint16(m))] x))
|
||||
(MOVBreg (ANDWconst [m] x)) && int8(m) >= 0 -> (MOVWZreg (ANDWconst <typ.UInt32> [int64( uint8(m))] x))
|
||||
@ -1194,29 +1194,29 @@
|
||||
// (only constant fold borrow of zero)
|
||||
(Select1 (SUBC (MOVDconst [c]) (MOVDconst [d])))
|
||||
&& uint64(d) <= uint64(c) && c-d == 0
|
||||
-> (FlagGT)
|
||||
=> (FlagGT)
|
||||
(Select1 (SUBC (MOVDconst [c]) (MOVDconst [d])))
|
||||
&& uint64(d) <= uint64(c) && c-d != 0
|
||||
-> (FlagOV)
|
||||
=> (FlagOV)
|
||||
|
||||
// add with carry
|
||||
(ADDE x y (FlagEQ)) -> (ADDC x y)
|
||||
(ADDE x y (FlagLT)) -> (ADDC x y)
|
||||
(ADDE x y (FlagEQ)) => (ADDC x y)
|
||||
(ADDE x y (FlagLT)) => (ADDC x y)
|
||||
(ADDC x (MOVDconst [c])) && is16Bit(c) -> (ADDCconst x [c])
|
||||
(Select0 (ADDCconst (MOVDconst [c]) [d])) -> (MOVDconst [c+d])
|
||||
|
||||
// subtract with borrow
|
||||
(SUBE x y (FlagGT)) -> (SUBC x y)
|
||||
(SUBE x y (FlagOV)) -> (SUBC x y)
|
||||
(Select0 (SUBC (MOVDconst [c]) (MOVDconst [d]))) -> (MOVDconst [c-d])
|
||||
(SUBE x y (FlagGT)) => (SUBC x y)
|
||||
(SUBE x y (FlagOV)) => (SUBC x y)
|
||||
(Select0 (SUBC (MOVDconst [c]) (MOVDconst [d]))) => (MOVDconst [c-d])
|
||||
|
||||
// collapse carry chain
|
||||
(ADDE x y (Select1 (ADDCconst [-1] (Select0 (ADDE (MOVDconst [0]) (MOVDconst [0]) c)))))
|
||||
-> (ADDE x y c)
|
||||
=> (ADDE x y c)
|
||||
|
||||
// collapse borrow chain
|
||||
(SUBE x y (Select1 (SUBC (MOVDconst [0]) (NEG (Select0 (SUBE (MOVDconst [0]) (MOVDconst [0]) c))))))
|
||||
-> (SUBE x y c)
|
||||
=> (SUBE x y c)
|
||||
|
||||
// branch on carry
|
||||
(C(G|LG)IJ {s390x.Equal} (Select0 (ADDE (MOVDconst [0]) (MOVDconst [0]) carry)) [0]) => (BRC {s390x.NoCarry} carry)
|
||||
|
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user