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cmd/compile: improve PPC64 rules for AtomicLoad{8,32}

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This adds a rule to avoid the zero extension after an AtomicLoad8
or AtomicLoad32 since the atomic load has already filled it with
zeros. This eliminates an instruction in a high use block in findObject
and the AtomicLoad8 appears many times within runtime.

Change-Id: I7e684bf73d3812110bd371e05b1aa44fa235fc9b
Reviewed-on: https://go-review.googlesource.com/c/go/+/354029
Run-TryBot: Lynn Boger <laboger@linux.vnet.ibm.com>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Trust: Lynn Boger <laboger@linux.vnet.ibm.com>
This commit is contained in:
Lynn Boger 2021-10-05 10:22:47 -05:00
parent 72c52bfbe2
commit ce72766a02
2 changed files with 30 additions and 0 deletions
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2
src/cmd/compile/internal/ssa/gen/PPC64.rules
View File

@ -1019,6 +1019,8 @@
(MOVWZreg x:(MOVWZloadidx _ _ _)) => x (MOVWZreg x:(MOVWZloadidx _ _ _)) => x
(MOVWreg x:(MOVWload _ _)) => x (MOVWreg x:(MOVWload _ _)) => x
(MOVWreg x:(MOVWloadidx _ _ _)) => x (MOVWreg x:(MOVWloadidx _ _ _)) => x
(MOVBZreg x:(Select0 (LoweredAtomicLoad8 _ _))) => x
(MOVWZreg x:(Select0 (LoweredAtomicLoad32 _ _))) => x
// don't extend if argument is already extended // don't extend if argument is already extended
(MOVBreg x:(Arg <t>)) && is8BitInt(t) && isSigned(t) => x (MOVBreg x:(Arg <t>)) && is8BitInt(t) && isSigned(t) => x

28
src/cmd/compile/internal/ssa/rewritePPC64.go
View File

@ -7093,6 +7093,20 @@ func rewriteValuePPC64_OpPPC64MOVBZreg(v *Value) bool {
v.copyOf(x) v.copyOf(x)
return true return true
} }
// match: (MOVBZreg x:(Select0 (LoweredAtomicLoad8 _ _)))
// result: x
for {
x := v_0
if x.Op != OpSelect0 {
break
}
x_0 := x.Args[0]
if x_0.Op != OpPPC64LoweredAtomicLoad8 {
break
}
v.copyOf(x)
return true
}
// match: (MOVBZreg x:(Arg <t>)) // match: (MOVBZreg x:(Arg <t>))
// cond: is8BitInt(t) && !isSigned(t) // cond: is8BitInt(t) && !isSigned(t)
// result: x // result: x
@ -10549,6 +10563,20 @@ func rewriteValuePPC64_OpPPC64MOVWZreg(v *Value) bool {
v.copyOf(x) v.copyOf(x)
return true return true
} }
// match: (MOVWZreg x:(Select0 (LoweredAtomicLoad32 _ _)))
// result: x
for {
x := v_0
if x.Op != OpSelect0 {
break
}
x_0 := x.Args[0]
if x_0.Op != OpPPC64LoweredAtomicLoad32 {
break
}
v.copyOf(x)
return true
}
// match: (MOVWZreg x:(Arg <t>)) // match: (MOVWZreg x:(Arg <t>))
// cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t) // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)
// result: x // result: x