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https://github.com/golang/go
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[dev.ssa] cmd/compile: handle boolean values for SSA on ARM
Fix hardcoded flag register mask in ssa/flagalloc.go by auto-generating the mask. Also fix a mistake (in previous CL) about conditional branches. Progress on SSA backend for ARM. Still not complete. Now "container/ring" package compiles and tests passed. Updates #15365. Change-Id: Id7c8805c30dbb8107baedb485ed0f71f59ed6ea8 Reviewed-on: https://go-review.googlesource.com/23093 Reviewed-by: Keith Randall <khr@golang.org>
This commit is contained in:
Cherry Zhang
parent
e2848de9ef
commit
ccaed50c7b
@ -193,7 +193,8 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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case ssa.OpARMMOVBreg,
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ssa.OpARMMOVBUreg,
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ssa.OpARMMOVHreg,
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ssa.OpARMMOVHUreg:
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ssa.OpARMMOVHUreg,
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ssa.OpARMMVN:
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if v.Type.IsMemory() {
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v.Fatalf("memory operand for %s", v.LongString())
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}
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@ -270,12 +271,37 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMLessEqualU,
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ssa.OpARMGreaterThanU,
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ssa.OpARMGreaterEqualU:
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v.Fatalf("pseudo-op made it to output: %s", v.LongString())
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// generate boolean values
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// use conditional move
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p := gc.Prog(arm.AMOVW)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = 0
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p.To.Type = obj.TYPE_REG
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p.To.Reg = gc.SSARegNum(v)
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p = gc.Prog(arm.AMOVW)
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p.Scond = condBits[v.Op]
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = 1
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p.To.Type = obj.TYPE_REG
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p.To.Reg = gc.SSARegNum(v)
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default:
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v.Unimplementedf("genValue not implemented: %s", v.LongString())
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}
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}
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var condBits = map[ssa.Op]uint8{
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ssa.OpARMEqual: arm.C_SCOND_EQ,
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ssa.OpARMNotEqual: arm.C_SCOND_NE,
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ssa.OpARMLessThan: arm.C_SCOND_LT,
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ssa.OpARMLessThanU: arm.C_SCOND_LO,
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ssa.OpARMLessEqual: arm.C_SCOND_LE,
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ssa.OpARMLessEqualU: arm.C_SCOND_LS,
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ssa.OpARMGreaterThan: arm.C_SCOND_GT,
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ssa.OpARMGreaterThanU: arm.C_SCOND_HI,
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ssa.OpARMGreaterEqual: arm.C_SCOND_GE,
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ssa.OpARMGreaterEqualU: arm.C_SCOND_HS,
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}
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var blockJump = map[ssa.BlockKind]struct {
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asm, invasm obj.As
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}{
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@ -285,8 +311,8 @@ var blockJump = map[ssa.BlockKind]struct {
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ssa.BlockARMGE: {arm.ABGE, arm.ABLT},
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ssa.BlockARMLE: {arm.ABLE, arm.ABGT},
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ssa.BlockARMGT: {arm.ABGT, arm.ABLE},
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ssa.BlockARMULT: {arm.ABCS, arm.ABCC},
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ssa.BlockARMUGE: {arm.ABCC, arm.ABCS},
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ssa.BlockARMULT: {arm.ABLO, arm.ABHS},
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ssa.BlockARMUGE: {arm.ABHS, arm.ABLO},
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ssa.BlockARMUGT: {arm.ABHI, arm.ABLS},
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ssa.BlockARMULE: {arm.ABLS, arm.ABHI},
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}
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@ -1135,6 +1135,7 @@ var opToSSA = map[opAndType]ssa.Op{
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opAndType{OEQ, TFUNC}: ssa.OpEqPtr,
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opAndType{OEQ, TMAP}: ssa.OpEqPtr,
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opAndType{OEQ, TCHAN}: ssa.OpEqPtr,
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opAndType{OEQ, TPTR32}: ssa.OpEqPtr,
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opAndType{OEQ, TPTR64}: ssa.OpEqPtr,
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opAndType{OEQ, TUINTPTR}: ssa.OpEqPtr,
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opAndType{OEQ, TUNSAFEPTR}: ssa.OpEqPtr,
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@ -1155,6 +1156,7 @@ var opToSSA = map[opAndType]ssa.Op{
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opAndType{ONE, TFUNC}: ssa.OpNeqPtr,
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opAndType{ONE, TMAP}: ssa.OpNeqPtr,
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opAndType{ONE, TCHAN}: ssa.OpNeqPtr,
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opAndType{ONE, TPTR32}: ssa.OpNeqPtr,
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opAndType{ONE, TPTR64}: ssa.OpNeqPtr,
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opAndType{ONE, TUINTPTR}: ssa.OpNeqPtr,
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opAndType{ONE, TUNSAFEPTR}: ssa.OpNeqPtr,
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@ -19,6 +19,7 @@ type Config struct {
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lowerBlock func(*Block) bool // lowering function
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lowerValue func(*Value, *Config) bool // lowering function
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registers []Register // machine registers
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flagRegMask regMask // flag register mask
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fe Frontend // callbacks into compiler frontend
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HTML *HTMLWriter // html writer, for debugging
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ctxt *obj.Link // Generic arch information
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@ -126,6 +127,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
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c.lowerBlock = rewriteBlockAMD64
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c.lowerValue = rewriteValueAMD64
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c.registers = registersAMD64[:]
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c.flagRegMask = flagRegMaskAMD64
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case "386":
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c.IntSize = 4
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c.PtrSize = 4
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@ -137,6 +139,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
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c.lowerBlock = rewriteBlockARM
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c.lowerValue = rewriteValueARM
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c.registers = registersARM[:]
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c.flagRegMask = flagRegMaskARM
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default:
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fe.Unimplementedf(0, "arch %s not implemented", arch)
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}
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@ -4,8 +4,6 @@
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package ssa
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const flagRegMask = regMask(1) << 33 // TODO: arch-specific
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// flagalloc allocates the flag register among all the flag-generating
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// instructions. Flag values are recomputed if they need to be
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// spilled/restored.
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@ -33,7 +31,7 @@ func flagalloc(f *Func) {
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if v == flag {
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flag = nil
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}
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if opcodeTable[v.Op].reg.clobbers&flagRegMask != 0 {
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if opcodeTable[v.Op].reg.clobbers&f.Config.flagRegMask != 0 {
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flag = nil
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}
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for _, a := range v.Args {
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@ -105,7 +103,7 @@ func flagalloc(f *Func) {
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}
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// Issue v.
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b.Values = append(b.Values, v)
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if opcodeTable[v.Op].reg.clobbers&flagRegMask != 0 {
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if opcodeTable[v.Op].reg.clobbers&f.Config.flagRegMask != 0 {
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flag = nil
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}
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if v.Type.IsFlags() {
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@ -551,5 +551,6 @@ func init() {
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ops: AMD64ops,
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blocks: AMD64blocks,
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regnames: regNamesAMD64,
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flagmask: flags,
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})
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}
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@ -2,11 +2,43 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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(AddPtr x y) -> (ADD x y)
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(Add32 x y) -> (ADD x y)
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(Add16 x y) -> (ADD x y)
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(Add8 x y) -> (ADD x y)
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(SubPtr x y) -> (SUB x y)
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(Sub32 x y) -> (SUB x y)
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(Sub16 x y) -> (SUB x y)
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(Sub8 x y) -> (SUB x y)
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(And32 x y) -> (AND x y)
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(And16 x y) -> (AND x y)
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(And8 x y) -> (AND x y)
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(Or32 x y) -> (OR x y)
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(Or16 x y) -> (OR x y)
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(Or8 x y) -> (OR x y)
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(Xor32 x y) -> (XOR x y)
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(Xor16 x y) -> (XOR x y)
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(Xor8 x y) -> (XOR x y)
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// unary ops
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(Neg32 x) -> (RSBconst [0] x)
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(Neg16 x) -> (RSBconst [0] x)
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(Neg8 x) -> (RSBconst [0] x)
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(Com32 x) -> (MVN x)
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(Com16 x) -> (MVN x)
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(Com8 x) -> (MVN x)
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// boolean ops -- booleans are represented with 0=false, 1=true
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(AndB x y) -> (AND x y)
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(OrB x y) -> (OR x y)
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(EqB x y) -> (XORconst [1] (XOR <config.fe.TypeBool()> x y))
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(NeqB x y) -> (XOR x y)
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(Not x) -> (XORconst [1] x)
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(Const8 [val]) -> (MOVWconst [val])
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(Const16 [val]) -> (MOVWconst [val])
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@ -29,10 +61,12 @@
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(Eq8 x y) -> (Equal (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
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(Eq16 x y) -> (Equal (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
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(Eq32 x y) -> (Equal (CMP x y))
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(EqPtr x y) -> (Equal (CMP x y))
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(Neq8 x y) -> (NotEqual (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
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(Neq16 x y) -> (NotEqual (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
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(Neq32 x y) -> (NotEqual (CMP x y))
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(NeqPtr x y) -> (NotEqual (CMP x y))
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(Less8 x y) -> (LessThan (CMP (SignExt8to32 x) (SignExt8to32 y)))
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(Less16 x y) -> (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y)))
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@ -89,6 +123,9 @@
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// checks
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(NilCheck ptr mem) -> (LoweredNilCheck ptr mem)
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(IsNonNil ptr) -> (NotEqual (CMPconst [0] ptr))
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(IsInBounds idx len) -> (LessThanU (CMP idx len))
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(IsSliceInBounds idx len) -> (LessEqualU (CMP idx len))
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// Absorb pseudo-ops into blocks.
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(If (Equal cc) yes no) -> (EQ cc yes no)
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@ -80,12 +80,12 @@ func init() {
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gp01 = regInfo{inputs: []regMask{}, outputs: []regMask{gp}}
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gp11 = regInfo{inputs: []regMask{gp}, outputs: []regMask{gp}}
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gp11sb = regInfo{inputs: []regMask{gpspsb}, outputs: []regMask{gp}}
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gp11flags = regInfo{inputs: []regMask{gp}, outputs: []regMask{gp | flags}}
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gp1flags = regInfo{inputs: []regMask{gp}, outputs: []regMask{flags}}
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gp21 = regInfo{inputs: []regMask{gp, gp}, outputs: []regMask{gp}}
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gp2flags = regInfo{inputs: []regMask{gp, gp}, outputs: []regMask{gp | flags}}
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gp2flags = regInfo{inputs: []regMask{gp, gp}, outputs: []regMask{flags}}
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gpload = regInfo{inputs: []regMask{gpspsb}, outputs: []regMask{gp}}
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gpstore = regInfo{inputs: []regMask{gpspsb, gp}, outputs: []regMask{}}
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flagsgp = regInfo{inputs: []regMask{gp | flags}, outputs: []regMask{gp}}
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readflags = regInfo{inputs: []regMask{flags}, outputs: []regMask{gp}}
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)
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ops := []opData{
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// binary ops
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@ -105,14 +105,17 @@ func init() {
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{name: "BIC", argLength: 2, reg: gp21, asm: "BIC"}, // arg0 &^ arg1
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{name: "BICconst", argLength: 1, reg: gp11, asm: "BIC", aux: "Int32"}, // arg0 &^ auxInt
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// unary ops
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{name: "MVN", argLength: 1, reg: gp11, asm: "MVN"}, // ^arg0
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{name: "CMP", argLength: 2, reg: gp2flags, asm: "CMP", typ: "Flags"}, // arg0 compare to arg1
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{name: "CMPconst", argLength: 1, reg: gp11flags, asm: "CMP", aux: "Int32", typ: "Flags"}, // arg0 compare to auxInt
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{name: "CMPconst", argLength: 1, reg: gp1flags, asm: "CMP", aux: "Int32", typ: "Flags"}, // arg0 compare to auxInt
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{name: "CMN", argLength: 2, reg: gp2flags, asm: "CMN", typ: "Flags"}, // arg0 compare to -arg1
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{name: "CMNconst", argLength: 1, reg: gp11flags, asm: "CMN", aux: "Int32", typ: "Flags"}, // arg0 compare to -auxInt
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{name: "CMNconst", argLength: 1, reg: gp1flags, asm: "CMN", aux: "Int32", typ: "Flags"}, // arg0 compare to -auxInt
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{name: "TST", argLength: 2, reg: gp2flags, asm: "TST", typ: "Flags", commutative: true}, // arg0 & arg1 compare to 0
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{name: "TSTconst", argLength: 1, reg: gp11flags, asm: "TST", aux: "Int32", typ: "Flags"}, // arg0 & auxInt compare to 0
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{name: "TSTconst", argLength: 1, reg: gp1flags, asm: "TST", aux: "Int32", typ: "Flags"}, // arg0 & auxInt compare to 0
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{name: "TEQ", argLength: 2, reg: gp2flags, asm: "TEQ", typ: "Flags", commutative: true}, // arg0 ^ arg1 compare to 0
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{name: "TEQconst", argLength: 1, reg: gp11flags, asm: "TEQ", aux: "Int32", typ: "Flags"}, // arg0 ^ auxInt compare to 0
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{name: "TEQconst", argLength: 1, reg: gp1flags, asm: "TEQ", aux: "Int32", typ: "Flags"}, // arg0 ^ auxInt compare to 0
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{name: "MOVWconst", argLength: 0, reg: gp01, aux: "Int32", asm: "MOVW", rematerializeable: true}, // 32 low bits of auxint
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@ -140,16 +143,16 @@ func init() {
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// pseudo-ops
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{name: "LoweredNilCheck", argLength: 2, reg: regInfo{inputs: []regMask{gpsp}, clobbers: flags}}, // panic if arg0 is nil. arg1=mem.
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{name: "Equal", argLength: 1, reg: flagsgp}, // bool, true flags encode x==y false otherwise.
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{name: "NotEqual", argLength: 1, reg: flagsgp}, // bool, true flags encode x!=y false otherwise.
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{name: "LessThan", argLength: 1, reg: flagsgp}, // bool, true flags encode signed x<y false otherwise.
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{name: "LessEqual", argLength: 1, reg: flagsgp}, // bool, true flags encode signed x<=y false otherwise.
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{name: "GreaterThan", argLength: 1, reg: flagsgp}, // bool, true flags encode signed x>y false otherwise.
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{name: "GreaterEqual", argLength: 1, reg: flagsgp}, // bool, true flags encode signed x>=y false otherwise.
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{name: "LessThanU", argLength: 1, reg: flagsgp}, // bool, true flags encode unsigned x<y false otherwise.
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{name: "LessEqualU", argLength: 1, reg: flagsgp}, // bool, true flags encode unsigned x<=y false otherwise.
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{name: "GreaterThanU", argLength: 1, reg: flagsgp}, // bool, true flags encode unsigned x>y false otherwise.
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{name: "GreaterEqualU", argLength: 1, reg: flagsgp}, // bool, true flags encode unsigned x>=y false otherwise.
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{name: "Equal", argLength: 1, reg: readflags}, // bool, true flags encode x==y false otherwise.
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{name: "NotEqual", argLength: 1, reg: readflags}, // bool, true flags encode x!=y false otherwise.
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{name: "LessThan", argLength: 1, reg: readflags}, // bool, true flags encode signed x<y false otherwise.
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{name: "LessEqual", argLength: 1, reg: readflags}, // bool, true flags encode signed x<=y false otherwise.
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{name: "GreaterThan", argLength: 1, reg: readflags}, // bool, true flags encode signed x>y false otherwise.
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{name: "GreaterEqual", argLength: 1, reg: readflags}, // bool, true flags encode signed x>=y false otherwise.
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{name: "LessThanU", argLength: 1, reg: readflags}, // bool, true flags encode unsigned x<y false otherwise.
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{name: "LessEqualU", argLength: 1, reg: readflags}, // bool, true flags encode unsigned x<=y false otherwise.
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{name: "GreaterThanU", argLength: 1, reg: readflags}, // bool, true flags encode unsigned x>y false otherwise.
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{name: "GreaterEqualU", argLength: 1, reg: readflags}, // bool, true flags encode unsigned x>=y false otherwise.
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}
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blocks := []blockData{
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@ -172,5 +175,6 @@ func init() {
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ops: ops,
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blocks: blocks,
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regnames: regNamesARM,
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flagmask: flags,
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})
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}
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@ -27,6 +27,7 @@ type arch struct {
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ops []opData
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blocks []blockData
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regnames []string
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flagmask regMask
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generic bool
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}
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@ -223,6 +224,7 @@ func genOp() {
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fmt.Fprintf(w, " {%d, \"%s\"},\n", i, r)
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}
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fmt.Fprintln(w, "}")
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fmt.Fprintf(w, "var flagRegMask%s = regMask(%d)\n", a.name, a.flagmask)
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}
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// gofmt result
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@ -337,6 +337,7 @@ const (
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OpARMXORconst
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OpARMBIC
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OpARMBICconst
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OpARMMVN
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OpARMCMP
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OpARMCMPconst
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OpARMCMN
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@ -4040,6 +4041,19 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "MVN",
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argLen: 1,
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asm: arm.AMVN,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
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},
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outputs: []regMask{
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5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
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},
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},
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},
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{
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name: "CMP",
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argLen: 2,
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@ -4050,7 +4064,7 @@ var opcodeTable = [...]opInfo{
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{1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
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},
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outputs: []regMask{
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70655, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
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65536, // FLAGS
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},
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},
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},
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@ -4064,7 +4078,7 @@ var opcodeTable = [...]opInfo{
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{0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
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},
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outputs: []regMask{
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70655, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
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65536, // FLAGS
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},
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},
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},
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@ -4078,7 +4092,7 @@ var opcodeTable = [...]opInfo{
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{1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
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},
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outputs: []regMask{
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70655, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
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65536, // FLAGS
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},
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},
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},
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@ -4092,7 +4106,7 @@ var opcodeTable = [...]opInfo{
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{0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
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},
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outputs: []regMask{
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70655, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
65536, // FLAGS
|
||||
},
|
||||
},
|
||||
},
|
||||
@ -4107,7 +4121,7 @@ var opcodeTable = [...]opInfo{
|
||||
{1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
},
|
||||
outputs: []regMask{
|
||||
70655, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
65536, // FLAGS
|
||||
},
|
||||
},
|
||||
},
|
||||
@ -4121,7 +4135,7 @@ var opcodeTable = [...]opInfo{
|
||||
{0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
},
|
||||
outputs: []regMask{
|
||||
70655, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
65536, // FLAGS
|
||||
},
|
||||
},
|
||||
},
|
||||
@ -4136,7 +4150,7 @@ var opcodeTable = [...]opInfo{
|
||||
{1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
},
|
||||
outputs: []regMask{
|
||||
70655, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
65536, // FLAGS
|
||||
},
|
||||
},
|
||||
},
|
||||
@ -4150,7 +4164,7 @@ var opcodeTable = [...]opInfo{
|
||||
{0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
},
|
||||
outputs: []regMask{
|
||||
70655, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
65536, // FLAGS
|
||||
},
|
||||
},
|
||||
},
|
||||
@ -4386,7 +4400,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4398,7 +4412,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4410,7 +4424,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4422,7 +4436,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4434,7 +4448,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4446,7 +4460,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4458,7 +4472,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4470,7 +4484,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4482,7 +4496,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -4494,7 +4508,7 @@ var opcodeTable = [...]opInfo{
|
||||
argLen: 1,
|
||||
reg: regInfo{
|
||||
inputs: []inputInfo{
|
||||
{0, 70655}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 FLAGS
|
||||
{0, 65536}, // FLAGS
|
||||
},
|
||||
outputs: []regMask{
|
||||
5119, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
|
||||
@ -6027,6 +6041,7 @@ var registersAMD64 = [...]Register{
|
||||
{32, "SB"},
|
||||
{33, "FLAGS"},
|
||||
}
|
||||
var flagRegMaskAMD64 = regMask(8589934592)
|
||||
var registersARM = [...]Register{
|
||||
{0, "R0"},
|
||||
{1, "R1"},
|
||||
@ -6047,3 +6062,4 @@ var registersARM = [...]Register{
|
||||
{16, "FLAGS"},
|
||||
{17, "SB"},
|
||||
}
|
||||
var flagRegMaskARM = regMask(65536)
|
||||
|
||||
@ -985,7 +985,7 @@ func (s *regAllocState) regalloc(f *Func) {
|
||||
args = append(args[:0], v.Args...)
|
||||
for _, i := range regspec.inputs {
|
||||
mask := i.regs
|
||||
if mask == flagRegMask {
|
||||
if mask == f.Config.flagRegMask {
|
||||
// TODO: remove flag input from regspec.inputs.
|
||||
continue
|
||||
}
|
||||
|
||||
@ -10,14 +10,32 @@ func rewriteValueARM(v *Value, config *Config) bool {
|
||||
switch v.Op {
|
||||
case OpARMADD:
|
||||
return rewriteValueARM_OpARMADD(v, config)
|
||||
case OpAdd16:
|
||||
return rewriteValueARM_OpAdd16(v, config)
|
||||
case OpAdd32:
|
||||
return rewriteValueARM_OpAdd32(v, config)
|
||||
case OpAdd8:
|
||||
return rewriteValueARM_OpAdd8(v, config)
|
||||
case OpAddPtr:
|
||||
return rewriteValueARM_OpAddPtr(v, config)
|
||||
case OpAddr:
|
||||
return rewriteValueARM_OpAddr(v, config)
|
||||
case OpAnd16:
|
||||
return rewriteValueARM_OpAnd16(v, config)
|
||||
case OpAnd32:
|
||||
return rewriteValueARM_OpAnd32(v, config)
|
||||
case OpAnd8:
|
||||
return rewriteValueARM_OpAnd8(v, config)
|
||||
case OpAndB:
|
||||
return rewriteValueARM_OpAndB(v, config)
|
||||
case OpClosureCall:
|
||||
return rewriteValueARM_OpClosureCall(v, config)
|
||||
case OpCom16:
|
||||
return rewriteValueARM_OpCom16(v, config)
|
||||
case OpCom32:
|
||||
return rewriteValueARM_OpCom32(v, config)
|
||||
case OpCom8:
|
||||
return rewriteValueARM_OpCom8(v, config)
|
||||
case OpConst16:
|
||||
return rewriteValueARM_OpConst16(v, config)
|
||||
case OpConst32:
|
||||
@ -36,6 +54,10 @@ func rewriteValueARM(v *Value, config *Config) bool {
|
||||
return rewriteValueARM_OpEq32(v, config)
|
||||
case OpEq8:
|
||||
return rewriteValueARM_OpEq8(v, config)
|
||||
case OpEqB:
|
||||
return rewriteValueARM_OpEqB(v, config)
|
||||
case OpEqPtr:
|
||||
return rewriteValueARM_OpEqPtr(v, config)
|
||||
case OpGeq16:
|
||||
return rewriteValueARM_OpGeq16(v, config)
|
||||
case OpGeq16U:
|
||||
@ -64,6 +86,12 @@ func rewriteValueARM(v *Value, config *Config) bool {
|
||||
return rewriteValueARM_OpGreater8U(v, config)
|
||||
case OpInterCall:
|
||||
return rewriteValueARM_OpInterCall(v, config)
|
||||
case OpIsInBounds:
|
||||
return rewriteValueARM_OpIsInBounds(v, config)
|
||||
case OpIsNonNil:
|
||||
return rewriteValueARM_OpIsNonNil(v, config)
|
||||
case OpIsSliceInBounds:
|
||||
return rewriteValueARM_OpIsSliceInBounds(v, config)
|
||||
case OpLeq16:
|
||||
return rewriteValueARM_OpLeq16(v, config)
|
||||
case OpLeq16U:
|
||||
@ -106,18 +134,36 @@ func rewriteValueARM(v *Value, config *Config) bool {
|
||||
return rewriteValueARM_OpARMMOVWload(v, config)
|
||||
case OpARMMOVWstore:
|
||||
return rewriteValueARM_OpARMMOVWstore(v, config)
|
||||
case OpNeg16:
|
||||
return rewriteValueARM_OpNeg16(v, config)
|
||||
case OpNeg32:
|
||||
return rewriteValueARM_OpNeg32(v, config)
|
||||
case OpNeg8:
|
||||
return rewriteValueARM_OpNeg8(v, config)
|
||||
case OpNeq16:
|
||||
return rewriteValueARM_OpNeq16(v, config)
|
||||
case OpNeq32:
|
||||
return rewriteValueARM_OpNeq32(v, config)
|
||||
case OpNeq8:
|
||||
return rewriteValueARM_OpNeq8(v, config)
|
||||
case OpNeqB:
|
||||
return rewriteValueARM_OpNeqB(v, config)
|
||||
case OpNeqPtr:
|
||||
return rewriteValueARM_OpNeqPtr(v, config)
|
||||
case OpNilCheck:
|
||||
return rewriteValueARM_OpNilCheck(v, config)
|
||||
case OpNot:
|
||||
return rewriteValueARM_OpNot(v, config)
|
||||
case OpOffPtr:
|
||||
return rewriteValueARM_OpOffPtr(v, config)
|
||||
case OpOr16:
|
||||
return rewriteValueARM_OpOr16(v, config)
|
||||
case OpOr32:
|
||||
return rewriteValueARM_OpOr32(v, config)
|
||||
case OpOr8:
|
||||
return rewriteValueARM_OpOr8(v, config)
|
||||
case OpOrB:
|
||||
return rewriteValueARM_OpOrB(v, config)
|
||||
case OpSignExt16to32:
|
||||
return rewriteValueARM_OpSignExt16to32(v, config)
|
||||
case OpSignExt8to16:
|
||||
@ -128,16 +174,26 @@ func rewriteValueARM(v *Value, config *Config) bool {
|
||||
return rewriteValueARM_OpStaticCall(v, config)
|
||||
case OpStore:
|
||||
return rewriteValueARM_OpStore(v, config)
|
||||
case OpSub16:
|
||||
return rewriteValueARM_OpSub16(v, config)
|
||||
case OpSub32:
|
||||
return rewriteValueARM_OpSub32(v, config)
|
||||
case OpSub8:
|
||||
return rewriteValueARM_OpSub8(v, config)
|
||||
case OpSubPtr:
|
||||
return rewriteValueARM_OpSubPtr(v, config)
|
||||
case OpTrunc16to8:
|
||||
return rewriteValueARM_OpTrunc16to8(v, config)
|
||||
case OpTrunc32to16:
|
||||
return rewriteValueARM_OpTrunc32to16(v, config)
|
||||
case OpTrunc32to8:
|
||||
return rewriteValueARM_OpTrunc32to8(v, config)
|
||||
case OpXor16:
|
||||
return rewriteValueARM_OpXor16(v, config)
|
||||
case OpXor32:
|
||||
return rewriteValueARM_OpXor32(v, config)
|
||||
case OpXor8:
|
||||
return rewriteValueARM_OpXor8(v, config)
|
||||
case OpZeroExt16to32:
|
||||
return rewriteValueARM_OpZeroExt16to32(v, config)
|
||||
case OpZeroExt8to16:
|
||||
@ -182,6 +238,21 @@ func rewriteValueARM_OpARMADD(v *Value, config *Config) bool {
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueARM_OpAdd16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Add16 x y)
|
||||
// cond:
|
||||
// result: (ADD x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMADD)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpAdd32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -197,6 +268,36 @@ func rewriteValueARM_OpAdd32(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpAdd8(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Add8 x y)
|
||||
// cond:
|
||||
// result: (ADD x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMADD)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpAddPtr(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (AddPtr x y)
|
||||
// cond:
|
||||
// result: (ADD x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMADD)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpAddr(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -212,6 +313,21 @@ func rewriteValueARM_OpAddr(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpAnd16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (And16 x y)
|
||||
// cond:
|
||||
// result: (AND x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMAND)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpAnd32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -227,6 +343,36 @@ func rewriteValueARM_OpAnd32(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpAnd8(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (And8 x y)
|
||||
// cond:
|
||||
// result: (AND x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMAND)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpAndB(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (AndB x y)
|
||||
// cond:
|
||||
// result: (AND x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMAND)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpClosureCall(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -246,6 +392,45 @@ func rewriteValueARM_OpClosureCall(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpCom16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Com16 x)
|
||||
// cond:
|
||||
// result: (MVN x)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
v.reset(OpARMMVN)
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpCom32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Com32 x)
|
||||
// cond:
|
||||
// result: (MVN x)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
v.reset(OpARMMVN)
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpCom8(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Com8 x)
|
||||
// cond:
|
||||
// result: (MVN x)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
v.reset(OpARMMVN)
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpConst16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -384,6 +569,41 @@ func rewriteValueARM_OpEq8(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpEqB(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (EqB x y)
|
||||
// cond:
|
||||
// result: (XORconst [1] (XOR <config.fe.TypeBool()> x y))
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMXORconst)
|
||||
v.AuxInt = 1
|
||||
v0 := b.NewValue0(v.Line, OpARMXOR, config.fe.TypeBool())
|
||||
v0.AddArg(x)
|
||||
v0.AddArg(y)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpEqPtr(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (EqPtr x y)
|
||||
// cond:
|
||||
// result: (Equal (CMP x y))
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMEqual)
|
||||
v0 := b.NewValue0(v.Line, OpARMCMP, TypeFlags)
|
||||
v0.AddArg(x)
|
||||
v0.AddArg(y)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpGeq16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -652,6 +872,56 @@ func rewriteValueARM_OpInterCall(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpIsInBounds(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (IsInBounds idx len)
|
||||
// cond:
|
||||
// result: (LessThanU (CMP idx len))
|
||||
for {
|
||||
idx := v.Args[0]
|
||||
len := v.Args[1]
|
||||
v.reset(OpARMLessThanU)
|
||||
v0 := b.NewValue0(v.Line, OpARMCMP, TypeFlags)
|
||||
v0.AddArg(idx)
|
||||
v0.AddArg(len)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpIsNonNil(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (IsNonNil ptr)
|
||||
// cond:
|
||||
// result: (NotEqual (CMPconst [0] ptr))
|
||||
for {
|
||||
ptr := v.Args[0]
|
||||
v.reset(OpARMNotEqual)
|
||||
v0 := b.NewValue0(v.Line, OpARMCMPconst, TypeFlags)
|
||||
v0.AuxInt = 0
|
||||
v0.AddArg(ptr)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpIsSliceInBounds(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (IsSliceInBounds idx len)
|
||||
// cond:
|
||||
// result: (LessEqualU (CMP idx len))
|
||||
for {
|
||||
idx := v.Args[0]
|
||||
len := v.Args[1]
|
||||
v.reset(OpARMLessEqualU)
|
||||
v0 := b.NewValue0(v.Line, OpARMCMP, TypeFlags)
|
||||
v0.AddArg(idx)
|
||||
v0.AddArg(len)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpLeq16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1221,6 +1491,48 @@ func rewriteValueARM_OpARMMOVWstore(v *Value, config *Config) bool {
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueARM_OpNeg16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Neg16 x)
|
||||
// cond:
|
||||
// result: (RSBconst [0] x)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
v.reset(OpARMRSBconst)
|
||||
v.AuxInt = 0
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpNeg32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Neg32 x)
|
||||
// cond:
|
||||
// result: (RSBconst [0] x)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
v.reset(OpARMRSBconst)
|
||||
v.AuxInt = 0
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpNeg8(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Neg8 x)
|
||||
// cond:
|
||||
// result: (RSBconst [0] x)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
v.reset(OpARMRSBconst)
|
||||
v.AuxInt = 0
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpNeq16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1280,6 +1592,38 @@ func rewriteValueARM_OpNeq8(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpNeqB(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (NeqB x y)
|
||||
// cond:
|
||||
// result: (XOR x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMXOR)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpNeqPtr(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (NeqPtr x y)
|
||||
// cond:
|
||||
// result: (NotEqual (CMP x y))
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMNotEqual)
|
||||
v0 := b.NewValue0(v.Line, OpARMCMP, TypeFlags)
|
||||
v0.AddArg(x)
|
||||
v0.AddArg(y)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpNilCheck(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1295,6 +1639,20 @@ func rewriteValueARM_OpNilCheck(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpNot(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Not x)
|
||||
// cond:
|
||||
// result: (XORconst [1] x)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
v.reset(OpARMXORconst)
|
||||
v.AuxInt = 1
|
||||
v.AddArg(x)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpOffPtr(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1312,6 +1670,21 @@ func rewriteValueARM_OpOffPtr(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpOr16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Or16 x y)
|
||||
// cond:
|
||||
// result: (OR x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMOR)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpOr32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1327,6 +1700,36 @@ func rewriteValueARM_OpOr32(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpOr8(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Or8 x y)
|
||||
// cond:
|
||||
// result: (OR x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMOR)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpOrB(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (OrB x y)
|
||||
// cond:
|
||||
// result: (OR x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMOR)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpSignExt16to32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1436,6 +1839,21 @@ func rewriteValueARM_OpStore(v *Value, config *Config) bool {
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueARM_OpSub16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Sub16 x y)
|
||||
// cond:
|
||||
// result: (SUB x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMSUB)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpSub32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1451,6 +1869,36 @@ func rewriteValueARM_OpSub32(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpSub8(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Sub8 x y)
|
||||
// cond:
|
||||
// result: (SUB x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMSUB)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpSubPtr(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (SubPtr x y)
|
||||
// cond:
|
||||
// result: (SUB x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMSUB)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpTrunc16to8(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1493,6 +1941,21 @@ func rewriteValueARM_OpTrunc32to8(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpXor16(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Xor16 x y)
|
||||
// cond:
|
||||
// result: (XOR x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMXOR)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpXor32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
@ -1508,6 +1971,21 @@ func rewriteValueARM_OpXor32(v *Value, config *Config) bool {
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpXor8(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
// match: (Xor8 x y)
|
||||
// cond:
|
||||
// result: (XOR x y)
|
||||
for {
|
||||
x := v.Args[0]
|
||||
y := v.Args[1]
|
||||
v.reset(OpARMXOR)
|
||||
v.AddArg(x)
|
||||
v.AddArg(y)
|
||||
return true
|
||||
}
|
||||
}
|
||||
func rewriteValueARM_OpZeroExt16to32(v *Value, config *Config) bool {
|
||||
b := v.Block
|
||||
_ = b
|
||||
|
||||
Loading…
Reference in New Issue
Block a user