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cmd/internal/obj/arm64: support MSR DIT

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Set the right instruction bits in asmout in order
to allow using MSR with DIT and an immediate
value. This allows us to avoid using an
intermediary register when we want to set DIT
(unsetting DIT already worked with the zero
register).

Ref: https://developer.arm.com/documentation/ddi0602/2024-06/Base-Instructions/MSR--immediate---Move-immediate-value-to-special-register-?lang=en
Change-Id: Id049a0b4e0feb534cea992553228f9b5e12ddcea
Reviewed-on: https://go-review.googlesource.com/c/go/+/597595
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
This commit is contained in:
Roland Shoemaker 2024-07-10 17:02:34 -05:00
parent c0eac35a4c
commit b5c2b1ec13
2 changed files with 4 additions and 0 deletions
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1
src/cmd/asm/internal/asm/testdata/arm64.s vendored
View File

@ -1777,6 +1777,7 @@ next:
MSR R17, ZCR_EL1 // 111218d5 MSR R17, ZCR_EL1 // 111218d5
SYS $32768, R1 // 018008d5 SYS $32768, R1 // 018008d5
SYS $32768 // 1f8008d5 SYS $32768 // 1f8008d5
MSR $1, DIT // 5f4103d5
// TLBI instruction // TLBI instruction
TLBI VMALLE1IS // 1f8308d5 TLBI VMALLE1IS // 1f8308d5

3
src/cmd/internal/obj/arm64/asm7.go
View File

@ -4229,6 +4229,9 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
// PSTATEfield can be special registers and special operands. // PSTATEfield can be special registers and special operands.
if p.To.Type == obj.TYPE_REG && p.To.Reg == REG_SPSel { if p.To.Type == obj.TYPE_REG && p.To.Reg == REG_SPSel {
v = 0<<16 | 4<<12 | 5<<5 v = 0<<16 | 4<<12 | 5<<5
} else if p.To.Type == obj.TYPE_REG && p.To.Reg == REG_DIT {
// op1 = 011 (3) op2 = 010 (2)
v = 3<<16 | 2<<5
} else if p.To.Type == obj.TYPE_SPECIAL { } else if p.To.Type == obj.TYPE_SPECIAL {
opd := SpecialOperand(p.To.Offset) opd := SpecialOperand(p.To.Offset)
for _, pf := range pstatefield { for _, pf := range pstatefield {