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https://github.com/golang/go
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cmd/compile: fold address calculations into CMPload[const] ops
Makes go binary smaller by 0.2%. I noticed this in autogenerated equal methods, and there are probably a lot of those. Change-Id: I4e04eb3653fbceb9dd6a4eee97ceab1fa4d10b72 Reviewed-on: https://go-review.googlesource.com/135379 Reviewed-by: Ilya Tocar <ilya.tocar@intel.com>
This commit is contained in:
Keith Randall
parent
a708353a0c
commit
b1f656b1ce
@ -1042,6 +1042,11 @@
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((ADD|SUB|AND|OR|XOR)Qload [off1+off2] {sym} val base mem)
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((ADD|SUB|AND|OR|XOR)Lload [off1] {sym} val (ADDQconst [off2] base) mem) && is32Bit(off1+off2) ->
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((ADD|SUB|AND|OR|XOR)Lload [off1+off2] {sym} val base mem)
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(CMP(Q|L|W|B)load [off1] {sym} (ADDQconst [off2] base) val mem) && is32Bit(off1+off2) ->
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(CMP(Q|L|W|B)load [off1+off2] {sym} base val mem)
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(CMP(Q|L|W|B)constload [off1] {sym} (ADDQconst [off2] base) mem) && is32Bit(off1+off2) ->
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(CMP(Q|L|W|B)constload [off1+off2] {sym} base mem)
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((ADD|SUB|MUL|DIV)SSload [off1] {sym} val (ADDQconst [off2] base) mem) && is32Bit(off1+off2) ->
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((ADD|SUB|MUL|DIV)SSload [off1+off2] {sym} val base mem)
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((ADD|SUB|MUL|DIV)SDload [off1] {sym} val (ADDQconst [off2] base) mem) && is32Bit(off1+off2) ->
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@ -1088,6 +1093,13 @@
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((ADD|SUB|AND|OR|XOR)Lload [off1] {sym1} val (LEAQ [off2] {sym2} base) mem)
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&& is32Bit(off1+off2) && canMergeSym(sym1, sym2) ->
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((ADD|SUB|AND|OR|XOR)Lload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
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(CMP(Q|L|W|B)load [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
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&& is32Bit(off1+off2) && canMergeSym(sym1, sym2) ->
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(CMP(Q|L|W|B)load [off1+off2] {mergeSym(sym1,sym2)} base val mem)
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(CMP(Q|L|W|B)constload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
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&& is32Bit(off1+off2) && canMergeSym(sym1, sym2) ->
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(CMP(Q|L|W|B)constload [off1+off2] {mergeSym(sym1,sym2)} base mem)
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((ADD|SUB|MUL|DIV)SSload [off1] {sym1} val (LEAQ [off2] {sym2} base) mem)
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&& is32Bit(off1+off2) && canMergeSym(sym1, sym2) ->
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((ADD|SUB|MUL|DIV)SSload [off1+off2] {mergeSym(sym1,sym2)} val base mem)
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@ -141,24 +141,32 @@ func rewriteValueAMD64(v *Value) bool {
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return rewriteValueAMD64_OpAMD64CMPB_0(v)
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case OpAMD64CMPBconst:
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return rewriteValueAMD64_OpAMD64CMPBconst_0(v)
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case OpAMD64CMPBconstload:
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return rewriteValueAMD64_OpAMD64CMPBconstload_0(v)
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case OpAMD64CMPBload:
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return rewriteValueAMD64_OpAMD64CMPBload_0(v)
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case OpAMD64CMPL:
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return rewriteValueAMD64_OpAMD64CMPL_0(v)
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case OpAMD64CMPLconst:
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return rewriteValueAMD64_OpAMD64CMPLconst_0(v) || rewriteValueAMD64_OpAMD64CMPLconst_10(v)
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case OpAMD64CMPLconstload:
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return rewriteValueAMD64_OpAMD64CMPLconstload_0(v)
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case OpAMD64CMPLload:
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return rewriteValueAMD64_OpAMD64CMPLload_0(v)
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case OpAMD64CMPQ:
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return rewriteValueAMD64_OpAMD64CMPQ_0(v)
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case OpAMD64CMPQconst:
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return rewriteValueAMD64_OpAMD64CMPQconst_0(v) || rewriteValueAMD64_OpAMD64CMPQconst_10(v)
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case OpAMD64CMPQconstload:
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return rewriteValueAMD64_OpAMD64CMPQconstload_0(v)
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case OpAMD64CMPQload:
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return rewriteValueAMD64_OpAMD64CMPQload_0(v)
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case OpAMD64CMPW:
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return rewriteValueAMD64_OpAMD64CMPW_0(v)
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case OpAMD64CMPWconst:
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return rewriteValueAMD64_OpAMD64CMPWconst_0(v)
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case OpAMD64CMPWconstload:
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return rewriteValueAMD64_OpAMD64CMPWconstload_0(v)
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case OpAMD64CMPWload:
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return rewriteValueAMD64_OpAMD64CMPWload_0(v)
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case OpAMD64CMPXCHGLlock:
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@ -7932,7 +7940,112 @@ func rewriteValueAMD64_OpAMD64CMPBconst_0(v *Value) bool {
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}
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return false
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}
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func rewriteValueAMD64_OpAMD64CMPBconstload_0(v *Value) bool {
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// match: (CMPBconstload [off1] {sym} (ADDQconst [off2] base) mem)
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// cond: is32Bit(off1+off2)
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// result: (CMPBconstload [off1+off2] {sym} base mem)
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for {
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off1 := v.AuxInt
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sym := v.Aux
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_ = v.Args[1]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64ADDQconst {
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break
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}
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off2 := v_0.AuxInt
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base := v_0.Args[0]
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mem := v.Args[1]
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if !(is32Bit(off1 + off2)) {
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break
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}
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v.reset(OpAMD64CMPBconstload)
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v.AuxInt = off1 + off2
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v.Aux = sym
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v.AddArg(base)
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v.AddArg(mem)
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return true
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}
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// match: (CMPBconstload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
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// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
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// result: (CMPBconstload [off1+off2] {mergeSym(sym1,sym2)} base mem)
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for {
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off1 := v.AuxInt
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sym1 := v.Aux
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_ = v.Args[1]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64LEAQ {
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break
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}
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off2 := v_0.AuxInt
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sym2 := v_0.Aux
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base := v_0.Args[0]
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mem := v.Args[1]
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if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
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break
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}
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v.reset(OpAMD64CMPBconstload)
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v.AuxInt = off1 + off2
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v.Aux = mergeSym(sym1, sym2)
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v.AddArg(base)
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v.AddArg(mem)
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return true
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}
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return false
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}
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func rewriteValueAMD64_OpAMD64CMPBload_0(v *Value) bool {
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// match: (CMPBload [off1] {sym} (ADDQconst [off2] base) val mem)
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// cond: is32Bit(off1+off2)
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// result: (CMPBload [off1+off2] {sym} base val mem)
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for {
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off1 := v.AuxInt
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sym := v.Aux
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_ = v.Args[2]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64ADDQconst {
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break
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}
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off2 := v_0.AuxInt
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base := v_0.Args[0]
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val := v.Args[1]
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mem := v.Args[2]
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if !(is32Bit(off1 + off2)) {
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break
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}
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v.reset(OpAMD64CMPBload)
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v.AuxInt = off1 + off2
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v.Aux = sym
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v.AddArg(base)
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v.AddArg(val)
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v.AddArg(mem)
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return true
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}
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// match: (CMPBload [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
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// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
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// result: (CMPBload [off1+off2] {mergeSym(sym1,sym2)} base val mem)
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for {
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off1 := v.AuxInt
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sym1 := v.Aux
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_ = v.Args[2]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64LEAQ {
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break
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}
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off2 := v_0.AuxInt
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sym2 := v_0.Aux
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base := v_0.Args[0]
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val := v.Args[1]
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mem := v.Args[2]
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if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
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break
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}
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v.reset(OpAMD64CMPBload)
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v.AuxInt = off1 + off2
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v.Aux = mergeSym(sym1, sym2)
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v.AddArg(base)
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v.AddArg(val)
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v.AddArg(mem)
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return true
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}
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// match: (CMPBload {sym} [off] ptr (MOVLconst [c]) mem)
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// cond: validValAndOff(int64(int8(c)),off)
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// result: (CMPBconstload {sym} [makeValAndOff(int64(int8(c)),off)] ptr mem)
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@ -8249,7 +8362,112 @@ func rewriteValueAMD64_OpAMD64CMPLconst_10(v *Value) bool {
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}
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return false
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}
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func rewriteValueAMD64_OpAMD64CMPLconstload_0(v *Value) bool {
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// match: (CMPLconstload [off1] {sym} (ADDQconst [off2] base) mem)
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// cond: is32Bit(off1+off2)
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// result: (CMPLconstload [off1+off2] {sym} base mem)
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for {
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off1 := v.AuxInt
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sym := v.Aux
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_ = v.Args[1]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64ADDQconst {
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break
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}
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off2 := v_0.AuxInt
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base := v_0.Args[0]
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mem := v.Args[1]
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if !(is32Bit(off1 + off2)) {
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break
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}
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v.reset(OpAMD64CMPLconstload)
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v.AuxInt = off1 + off2
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v.Aux = sym
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v.AddArg(base)
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v.AddArg(mem)
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return true
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}
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// match: (CMPLconstload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
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// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
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// result: (CMPLconstload [off1+off2] {mergeSym(sym1,sym2)} base mem)
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for {
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off1 := v.AuxInt
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sym1 := v.Aux
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_ = v.Args[1]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64LEAQ {
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break
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}
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off2 := v_0.AuxInt
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sym2 := v_0.Aux
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base := v_0.Args[0]
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mem := v.Args[1]
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if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
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break
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}
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v.reset(OpAMD64CMPLconstload)
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v.AuxInt = off1 + off2
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v.Aux = mergeSym(sym1, sym2)
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v.AddArg(base)
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v.AddArg(mem)
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return true
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}
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return false
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}
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func rewriteValueAMD64_OpAMD64CMPLload_0(v *Value) bool {
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// match: (CMPLload [off1] {sym} (ADDQconst [off2] base) val mem)
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// cond: is32Bit(off1+off2)
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// result: (CMPLload [off1+off2] {sym} base val mem)
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for {
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off1 := v.AuxInt
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sym := v.Aux
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_ = v.Args[2]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64ADDQconst {
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break
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}
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off2 := v_0.AuxInt
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base := v_0.Args[0]
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val := v.Args[1]
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mem := v.Args[2]
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if !(is32Bit(off1 + off2)) {
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break
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}
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v.reset(OpAMD64CMPLload)
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v.AuxInt = off1 + off2
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v.Aux = sym
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v.AddArg(base)
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v.AddArg(val)
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v.AddArg(mem)
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return true
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}
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// match: (CMPLload [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
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// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
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// result: (CMPLload [off1+off2] {mergeSym(sym1,sym2)} base val mem)
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for {
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off1 := v.AuxInt
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sym1 := v.Aux
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_ = v.Args[2]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64LEAQ {
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break
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}
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off2 := v_0.AuxInt
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sym2 := v_0.Aux
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base := v_0.Args[0]
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val := v.Args[1]
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mem := v.Args[2]
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if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
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break
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}
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v.reset(OpAMD64CMPLload)
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v.AuxInt = off1 + off2
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v.Aux = mergeSym(sym1, sym2)
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v.AddArg(base)
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v.AddArg(val)
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v.AddArg(mem)
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return true
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}
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// match: (CMPLload {sym} [off] ptr (MOVLconst [c]) mem)
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// cond: validValAndOff(c,off)
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// result: (CMPLconstload {sym} [makeValAndOff(c,off)] ptr mem)
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@ -8689,7 +8907,112 @@ func rewriteValueAMD64_OpAMD64CMPQconst_10(v *Value) bool {
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}
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return false
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}
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func rewriteValueAMD64_OpAMD64CMPQconstload_0(v *Value) bool {
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// match: (CMPQconstload [off1] {sym} (ADDQconst [off2] base) mem)
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// cond: is32Bit(off1+off2)
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// result: (CMPQconstload [off1+off2] {sym} base mem)
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for {
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off1 := v.AuxInt
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sym := v.Aux
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_ = v.Args[1]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64ADDQconst {
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break
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}
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off2 := v_0.AuxInt
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base := v_0.Args[0]
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mem := v.Args[1]
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if !(is32Bit(off1 + off2)) {
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break
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}
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v.reset(OpAMD64CMPQconstload)
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v.AuxInt = off1 + off2
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v.Aux = sym
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v.AddArg(base)
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v.AddArg(mem)
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return true
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}
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// match: (CMPQconstload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
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// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
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// result: (CMPQconstload [off1+off2] {mergeSym(sym1,sym2)} base mem)
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for {
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off1 := v.AuxInt
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sym1 := v.Aux
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_ = v.Args[1]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64LEAQ {
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break
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}
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off2 := v_0.AuxInt
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sym2 := v_0.Aux
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base := v_0.Args[0]
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mem := v.Args[1]
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if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
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break
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}
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v.reset(OpAMD64CMPQconstload)
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v.AuxInt = off1 + off2
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v.Aux = mergeSym(sym1, sym2)
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v.AddArg(base)
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v.AddArg(mem)
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return true
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}
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return false
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}
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func rewriteValueAMD64_OpAMD64CMPQload_0(v *Value) bool {
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// match: (CMPQload [off1] {sym} (ADDQconst [off2] base) val mem)
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// cond: is32Bit(off1+off2)
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// result: (CMPQload [off1+off2] {sym} base val mem)
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for {
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off1 := v.AuxInt
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sym := v.Aux
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_ = v.Args[2]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64ADDQconst {
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break
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}
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off2 := v_0.AuxInt
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base := v_0.Args[0]
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val := v.Args[1]
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mem := v.Args[2]
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if !(is32Bit(off1 + off2)) {
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break
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}
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v.reset(OpAMD64CMPQload)
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v.AuxInt = off1 + off2
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v.Aux = sym
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v.AddArg(base)
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v.AddArg(val)
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v.AddArg(mem)
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return true
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}
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// match: (CMPQload [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
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// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
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// result: (CMPQload [off1+off2] {mergeSym(sym1,sym2)} base val mem)
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for {
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off1 := v.AuxInt
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sym1 := v.Aux
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_ = v.Args[2]
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v_0 := v.Args[0]
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if v_0.Op != OpAMD64LEAQ {
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break
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}
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off2 := v_0.AuxInt
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sym2 := v_0.Aux
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base := v_0.Args[0]
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val := v.Args[1]
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mem := v.Args[2]
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if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
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break
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}
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v.reset(OpAMD64CMPQload)
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v.AuxInt = off1 + off2
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v.Aux = mergeSym(sym1, sym2)
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v.AddArg(base)
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v.AddArg(val)
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v.AddArg(mem)
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return true
|
||||
}
|
||||
// match: (CMPQload {sym} [off] ptr (MOVQconst [c]) mem)
|
||||
// cond: validValAndOff(c,off)
|
||||
// result: (CMPQconstload {sym} [makeValAndOff(c,off)] ptr mem)
|
||||
@ -8987,7 +9310,112 @@ func rewriteValueAMD64_OpAMD64CMPWconst_0(v *Value) bool {
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueAMD64_OpAMD64CMPWconstload_0(v *Value) bool {
|
||||
// match: (CMPWconstload [off1] {sym} (ADDQconst [off2] base) mem)
|
||||
// cond: is32Bit(off1+off2)
|
||||
// result: (CMPWconstload [off1+off2] {sym} base mem)
|
||||
for {
|
||||
off1 := v.AuxInt
|
||||
sym := v.Aux
|
||||
_ = v.Args[1]
|
||||
v_0 := v.Args[0]
|
||||
if v_0.Op != OpAMD64ADDQconst {
|
||||
break
|
||||
}
|
||||
off2 := v_0.AuxInt
|
||||
base := v_0.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(is32Bit(off1 + off2)) {
|
||||
break
|
||||
}
|
||||
v.reset(OpAMD64CMPWconstload)
|
||||
v.AuxInt = off1 + off2
|
||||
v.Aux = sym
|
||||
v.AddArg(base)
|
||||
v.AddArg(mem)
|
||||
return true
|
||||
}
|
||||
// match: (CMPWconstload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
|
||||
// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
|
||||
// result: (CMPWconstload [off1+off2] {mergeSym(sym1,sym2)} base mem)
|
||||
for {
|
||||
off1 := v.AuxInt
|
||||
sym1 := v.Aux
|
||||
_ = v.Args[1]
|
||||
v_0 := v.Args[0]
|
||||
if v_0.Op != OpAMD64LEAQ {
|
||||
break
|
||||
}
|
||||
off2 := v_0.AuxInt
|
||||
sym2 := v_0.Aux
|
||||
base := v_0.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
|
||||
break
|
||||
}
|
||||
v.reset(OpAMD64CMPWconstload)
|
||||
v.AuxInt = off1 + off2
|
||||
v.Aux = mergeSym(sym1, sym2)
|
||||
v.AddArg(base)
|
||||
v.AddArg(mem)
|
||||
return true
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValueAMD64_OpAMD64CMPWload_0(v *Value) bool {
|
||||
// match: (CMPWload [off1] {sym} (ADDQconst [off2] base) val mem)
|
||||
// cond: is32Bit(off1+off2)
|
||||
// result: (CMPWload [off1+off2] {sym} base val mem)
|
||||
for {
|
||||
off1 := v.AuxInt
|
||||
sym := v.Aux
|
||||
_ = v.Args[2]
|
||||
v_0 := v.Args[0]
|
||||
if v_0.Op != OpAMD64ADDQconst {
|
||||
break
|
||||
}
|
||||
off2 := v_0.AuxInt
|
||||
base := v_0.Args[0]
|
||||
val := v.Args[1]
|
||||
mem := v.Args[2]
|
||||
if !(is32Bit(off1 + off2)) {
|
||||
break
|
||||
}
|
||||
v.reset(OpAMD64CMPWload)
|
||||
v.AuxInt = off1 + off2
|
||||
v.Aux = sym
|
||||
v.AddArg(base)
|
||||
v.AddArg(val)
|
||||
v.AddArg(mem)
|
||||
return true
|
||||
}
|
||||
// match: (CMPWload [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
|
||||
// cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
|
||||
// result: (CMPWload [off1+off2] {mergeSym(sym1,sym2)} base val mem)
|
||||
for {
|
||||
off1 := v.AuxInt
|
||||
sym1 := v.Aux
|
||||
_ = v.Args[2]
|
||||
v_0 := v.Args[0]
|
||||
if v_0.Op != OpAMD64LEAQ {
|
||||
break
|
||||
}
|
||||
off2 := v_0.AuxInt
|
||||
sym2 := v_0.Aux
|
||||
base := v_0.Args[0]
|
||||
val := v.Args[1]
|
||||
mem := v.Args[2]
|
||||
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
|
||||
break
|
||||
}
|
||||
v.reset(OpAMD64CMPWload)
|
||||
v.AuxInt = off1 + off2
|
||||
v.Aux = mergeSym(sym1, sym2)
|
||||
v.AddArg(base)
|
||||
v.AddArg(val)
|
||||
v.AddArg(mem)
|
||||
return true
|
||||
}
|
||||
// match: (CMPWload {sym} [off] ptr (MOVLconst [c]) mem)
|
||||
// cond: validValAndOff(int64(int16(c)),off)
|
||||
// result: (CMPWconstload {sym} [makeValAndOff(int64(int16(c)),off)] ptr mem)
|
||||
|
||||
86
test/codegen/memops.go
Normal file
86
test/codegen/memops.go
Normal file
@ -0,0 +1,86 @@
|
||||
// asmcheck
|
||||
|
||||
// Copyright 2018 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
package codegen
|
||||
|
||||
var x [2]bool
|
||||
var x8 [2]uint8
|
||||
var x16 [2]uint16
|
||||
var x32 [2]uint32
|
||||
var x64 [2]uint64
|
||||
|
||||
func compMem1() int {
|
||||
// amd64:`CMPB\t"".x\+1\(SB\), [$]0`
|
||||
if x[1] {
|
||||
return 1
|
||||
}
|
||||
// amd64:`CMPB\t"".x8\+1\(SB\), [$]7`
|
||||
if x8[1] == 7 {
|
||||
return 1
|
||||
}
|
||||
// amd64:`CMPW\t"".x16\+2\(SB\), [$]7`
|
||||
if x16[1] == 7 {
|
||||
return 1
|
||||
}
|
||||
// amd64:`CMPL\t"".x32\+4\(SB\), [$]7`
|
||||
if x32[1] == 7 {
|
||||
return 1
|
||||
}
|
||||
// amd64:`CMPQ\t"".x64\+8\(SB\), [$]7`
|
||||
if x64[1] == 7 {
|
||||
return 1
|
||||
}
|
||||
return 0
|
||||
}
|
||||
|
||||
//go:noinline
|
||||
func f(x int) bool {
|
||||
return false
|
||||
}
|
||||
|
||||
//go:noinline
|
||||
func f8(x int) int8 {
|
||||
return 0
|
||||
}
|
||||
|
||||
//go:noinline
|
||||
func f16(x int) int16 {
|
||||
return 0
|
||||
}
|
||||
|
||||
//go:noinline
|
||||
func f32(x int) int32 {
|
||||
return 0
|
||||
}
|
||||
|
||||
//go:noinline
|
||||
func f64(x int) int64 {
|
||||
return 0
|
||||
}
|
||||
|
||||
func compMem2() int {
|
||||
// amd64:`CMPB\t8\(SP\), [$]0`
|
||||
if f(3) {
|
||||
return 1
|
||||
}
|
||||
// amd64:`CMPB\t8\(SP\), [$]7`
|
||||
if f8(3) == 7 {
|
||||
return 1
|
||||
}
|
||||
// amd64:`CMPW\t8\(SP\), [$]7`
|
||||
if f16(3) == 7 {
|
||||
return 1
|
||||
}
|
||||
// amd64:`CMPL\t8\(SP\), [$]7`
|
||||
if f32(3) == 7 {
|
||||
return 1
|
||||
}
|
||||
// amd64:`CMPQ\t8\(SP\), [$]7`
|
||||
if f64(3) == 7 {
|
||||
return 1
|
||||
}
|
||||
return 0
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user