From af991a6d28949cd27a41a93b46abf42cbf07023d Mon Sep 17 00:00:00 2001 From: Wayne Zuo Date: Wed, 31 Aug 2022 09:06:41 +0800 Subject: [PATCH] cmd/compile: reorder rotate lowering rules in AMD64.rules These rules should belong to lowering rules not optimizations. Change-Id: I964d2c4b1d9bef0ede572978aff01cb11bf050ac Reviewed-on: https://go-review.googlesource.com/c/go/+/426197 Reviewed-by: Keith Randall Reviewed-by: Heschi Kreinick Reviewed-by: Keith Randall Auto-Submit: Keith Randall TryBot-Result: Gopher Robot Run-TryBot: Wayne Zuo --- src/cmd/compile/internal/ssa/gen/AMD64.rules | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/cmd/compile/internal/ssa/gen/AMD64.rules b/src/cmd/compile/internal/ssa/gen/AMD64.rules index e66718d70e..2b6001016d 100644 --- a/src/cmd/compile/internal/ssa/gen/AMD64.rules +++ b/src/cmd/compile/internal/ssa/gen/AMD64.rules @@ -563,6 +563,12 @@ (PanicBounds [kind] x y mem) && boundsABI(kind) == 1 => (LoweredPanicBoundsB [kind] x y mem) (PanicBounds [kind] x y mem) && boundsABI(kind) == 2 => (LoweredPanicBoundsC [kind] x y mem) +// lowering rotates +(RotateLeft8 ...) => (ROLB ...) +(RotateLeft16 ...) => (ROLW ...) +(RotateLeft32 ...) => (ROLL ...) +(RotateLeft64 ...) => (ROLQ ...) + // *************************** // Above: lowering rules // Below: optimizations @@ -853,11 +859,6 @@ ((SHLL|SHRL|SARL|SHLXL|SHRXL|SARXL) x (ANDLconst [c] y)) && c & 31 == 31 => ((SHLL|SHRL|SARL|SHLXL|SHRXL|SARXL) x y) ((SHLL|SHRL|SARL|SHLXL|SHRXL|SARXL) x (NEGL (ANDLconst [c] y))) && c & 31 == 31 => ((SHLL|SHRL|SARL|SHLXL|SHRXL|SARXL) x (NEGL y)) -(RotateLeft8 ...) => (ROLB ...) -(RotateLeft16 ...) => (ROLW ...) -(RotateLeft32 ...) => (ROLL ...) -(RotateLeft64 ...) => (ROLQ ...) - // rotate left negative = rotate right (ROLQ x (NEG(Q|L) y)) => (RORQ x y) (ROLL x (NEG(Q|L) y)) => (RORL x y)