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[dev.cc] cmd/asm: implement FMADD for ppc64
Missed this one instruction in the previous pass. Change-Id: Ic8cdae4d3bfd626c6bbe0ce49fce28b53db2ad1c Reviewed-on: https://go-review.googlesource.com/5420 Reviewed-by: Russ Cox <rsc@golang.org>
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@ -20,12 +20,18 @@ func jumpPPC64(word string) bool {
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// IsPPC64RLD reports whether the op (as defined by an ppc64.A* constant) is
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// one of the RLD-like instructions that require special handling.
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// The FMADD-like instructions behave similarly.
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func IsPPC64RLD(op int) bool {
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switch op {
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case ppc64.ARLDC, ppc64.ARLDCCC, ppc64.ARLDCL, ppc64.ARLDCLCC,
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ppc64.ARLDCR, ppc64.ARLDCRCC, ppc64.ARLDMI, ppc64.ARLDMICC,
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ppc64.ARLWMI, ppc64.ARLWMICC, ppc64.ARLWNM, ppc64.ARLWNMCC:
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return true
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case ppc64.AFMADD, ppc64.AFMADDCC, ppc64.AFMADDS, ppc64.AFMADDSCC,
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ppc64.AFMSUB, ppc64.AFMSUBCC, ppc64.AFMSUBS, ppc64.AFMSUBSCC,
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ppc64.AFNMADD, ppc64.AFNMADDCC, ppc64.AFNMADDS, ppc64.AFNMADDSCC,
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ppc64.AFNMSUB, ppc64.AFNMSUBCC, ppc64.AFNMSUBS, ppc64.AFNMSUBSCC:
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return true
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}
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return false
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}
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@ -549,7 +549,9 @@ func (p *Parser) asmInstruction(op int, cond string, a []obj.Addr) {
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break
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}
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if p.arch.Thechar == '9' && arch.IsPPC64RLD(op) {
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// 2nd operand is always a register.
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// 2nd operand must always be a register.
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// TODO: Do we need to guard this with the instruction type?
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// That is, are there 4-operand instructions without this property?
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prog.From = a[0]
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prog.Reg = p.getRegister(prog, op, &a[1])
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prog.From3 = a[2]
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