From ace9ff4578cb6d3077fbd2c7934b4ac063047145 Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Wed, 17 Oct 2012 14:27:58 +0800 Subject: [PATCH] sync/atomic: FreeBSD/ARM support only supports ARMv6K and newer ARM cores. R=rsc, dave CC=golang-dev https://golang.org/cl/6601064 --- .../{64bit_linux_arm.go => 64bit_arm.go} | 0 src/pkg/sync/atomic/asm_freebsd_arm.s | 89 +++++++++++++++++++ 2 files changed, 89 insertions(+) rename src/pkg/sync/atomic/{64bit_linux_arm.go => 64bit_arm.go} (100%) create mode 100644 src/pkg/sync/atomic/asm_freebsd_arm.s diff --git a/src/pkg/sync/atomic/64bit_linux_arm.go b/src/pkg/sync/atomic/64bit_arm.go similarity index 100% rename from src/pkg/sync/atomic/64bit_linux_arm.go rename to src/pkg/sync/atomic/64bit_arm.go diff --git a/src/pkg/sync/atomic/asm_freebsd_arm.s b/src/pkg/sync/atomic/asm_freebsd_arm.s new file mode 100644 index 0000000000..6590921b08 --- /dev/null +++ b/src/pkg/sync/atomic/asm_freebsd_arm.s @@ -0,0 +1,89 @@ +// Copyright 2012 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +// FreeBSD/ARM atomic operations. +// TODO(minux): this only supports ARMv6K or higher. + +TEXT ·CompareAndSwapInt32(SB),7,$0 + B ·CompareAndSwapUint32(SB) + +TEXT ·CompareAndSwapUint32(SB),7,$0 + B ·armCompareAndSwapUint32(SB) + +TEXT ·CompareAndSwapUintptr(SB),7,$0 + B ·CompareAndSwapUint32(SB) + +TEXT ·CompareAndSwapPointer(SB),7,$0 + B ·CompareAndSwapUint32(SB) + +TEXT ·AddInt32(SB),7,$0 + B ·AddUint32(SB) + +TEXT ·AddUint32(SB),7,$0 + B ·armAddUint32(SB) + +TEXT ·AddUintptr(SB),7,$0 + B ·AddUint32(SB) + +TEXT ·CompareAndSwapInt64(SB),7,$0 + B ·CompareAndSwapUint64(SB) + +TEXT ·CompareAndSwapUint64(SB),7,$-4 + B ·armCompareAndSwapUint64(SB) + +TEXT ·AddInt64(SB),7,$0 + B ·addUint64(SB) + +TEXT ·AddUint64(SB),7,$0 + B ·addUint64(SB) + +TEXT ·LoadInt32(SB),7,$0 + B ·LoadUint32(SB) + +TEXT ·LoadUint32(SB),7,$0 + MOVW addr+0(FP), R1 +load32loop: + LDREX (R1), R2 // loads R2 + STREX R2, (R1), R0 // stores R2 + CMP $0, R0 + BNE load32loop + MOVW R2, val+4(FP) + RET + +TEXT ·LoadInt64(SB),7,$0 + B ·loadUint64(SB) + +TEXT ·LoadUint64(SB),7,$0 + B ·loadUint64(SB) + +TEXT ·LoadUintptr(SB),7,$0 + B ·LoadUint32(SB) + +TEXT ·LoadPointer(SB),7,$0 + B ·LoadUint32(SB) + +TEXT ·StoreInt32(SB),7,$0 + B ·StoreUint32(SB) + +TEXT ·StoreUint32(SB),7,$0 + MOVW addr+0(FP), R1 + MOVW val+4(FP), R2 +storeloop: + LDREX (R1), R4 // loads R4 + STREX R2, (R1), R0 // stores R2 + CMP $0, R0 + BNE storeloop + RET + +TEXT ·StoreInt64(SB),7,$0 + B ·storeUint64(SB) + +TEXT ·StoreUint64(SB),7,$0 + B ·storeUint64(SB) + +TEXT ·StoreUintptr(SB),7,$0 + B ·StoreUint32(SB) + +TEXT ·StorePointer(SB),7,$0 + B ·StoreUint32(SB)