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sync/atomic: replace MFENCE with LOCK XADD

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MFENCE was introduced only on the Pentium4 (SSE2),
while XADD was introduced on the 486.
Fixes #2268.

R=golang-dev, rsc
CC=fshahriar, golang-dev
https://golang.org/cl/5056045
This commit is contained in:
Dmitriy Vyukov 2011-09-19 11:09:00 -07:00
parent 6f18233373
commit ab596cae9e
1 changed files with 7 additions and 2 deletions
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9
src/pkg/sync/atomic/asm_386.s
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@ -103,6 +103,7 @@ TEXT ·LoadInt64(SB),7,$0
TEXT ·LoadUint64(SB),7,$0
MOVL addrptr+0(FP), AX
// MOVQ and EMMS were introduced on the Pentium MMX.
// MOVQ (%EAX), %MM0
BYTE $0x0f; BYTE $0x6f; BYTE $0x00
// MOVQ %MM0, 0x8(%ESP)
@ -131,14 +132,18 @@ TEXT ·StoreInt64(SB),7,$0
TEXT ·StoreUint64(SB),7,$0
MOVL addrptr+0(FP), AX
// MOVQ and EMMS were introduced on the Pentium MMX.
// MOVQ 0x8(%ESP), %MM0
BYTE $0x0f; BYTE $0x6f; BYTE $0x44; BYTE $0x24; BYTE $0x08
// MOVQ %MM0, (%EAX)
BYTE $0x0f; BYTE $0x7f; BYTE $0x00
// EMMS
BYTE $0x0F; BYTE $0x77
// MFENCE
BYTE $0x0f; BYTE $0xae; BYTE $0xf0
// This is essentially a no-op, but it provides required memory fencing.
// It can be replaced with MFENCE, but MFENCE was introduced only on the Pentium4 (SSE2).
XORL AX, AX
LOCK
XADDL AX, (SP)
RET
TEXT ·StoreUintptr(SB),7,$0