qbit/go
1
0
Fork 0
mirror of https://github.com/golang/go synced 2024-11-23 20:40:07 -07:00
Code Releases Activity

cmd/compile/internal/ssa: inline memmove with known size

Browse Source 
Contributors to the loong64 port are:
  Weining Lu <luweining@loongson.cn>
  Lei Wang <wanglei@loongson.cn>
  Lingqin Gong <gonglingqin@loongson.cn>
  Xiaolin Zhao <zhaoxiaolin@loongson.cn>
  Meidan Li <limeidan@loongson.cn>
  Xiaojuan Zhai <zhaixiaojuan@loongson.cn>
  Qiyuan Pu <puqiyuan@loongson.cn>
  Guoqi Chen <chenguoqi@loongson.cn>

This port has been updated to Go 1.15.6:
  https://github.com/loongson/go

Updates #46229

Change-Id: I1534b66b527efaf2bbaa8e6e6ac0618aac0b5930
Reviewed-on: https://go-review.googlesource.com/c/go/+/367040
Run-TryBot: Ian Lance Taylor <iant@google.com>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Ian Lance Taylor <iant@google.com>
Auto-Submit: Ian Lance Taylor <iant@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
This commit is contained in:
Xiaodong Liu 2021-11-25 10:26:47 +08:00 committed by Gopher Robot
parent c14ed5b37c
commit a6c95e75d9
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/cmd/compile/internal/ssa/rewrite.go
View File

@ -1376,7 +1376,7 @@ func isInlinableMemmove(dst, src *Value, sz int64, c *Config) bool {
return sz <= 8
case "s390x", "ppc64", "ppc64le":
return sz <= 8 || disjoint(dst, sz, src, sz)
case "arm", "mips", "mips64", "mipsle", "mips64le":
case "arm", "loong64", "mips", "mips64", "mipsle", "mips64le":
return sz <= 4
}
return false