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cmd/internal/obj/loong64: improve the definition of plan9 assembly format in optab

In the three formats corresponding to case 7 of the function asmout, BREAK actually
corresponds to the cacop instruction of Loong64, refer to the loong64 instruction
manual volume 1 [1], the cacop instruction is a privileged instruction used to
maintain the cache, and the user mode does not have permission to execute.

Referring to the loong64 instruction manual volume 1 [1], the SYSCALL, BREAK and DBAR
instructions have similar formats and can be grouped into one category, the RDTIMED,
RDTIMELW and RDTIMEHW instructions can be grouped into one category, and the NOOP and
UNDEF instructions can be grouped into one category.

[1]: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: I0b8998270102d1557fc2b2410cf8c0b078bd0c2e
Reviewed-on: https://go-review.googlesource.com/c/go/+/493435
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: Carlos Amedee <carlos@golang.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Run-TryBot: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Auto-Submit: Cherry Mui <cherryyz@google.com>
This commit is contained in:
Guoqi Chen 2023-05-08 06:20:21 +08:00 committed by Gopher Robot
parent ec711aaaaa
commit 9ea4770e14
2 changed files with 42 additions and 36 deletions

View File

@ -141,8 +141,6 @@ lable2:
MOVV R4, F5 // 85a81401 MOVV R4, F5 // 85a81401
MOVV F4, R5 // 85b81401 MOVV F4, R5 // 85b81401
WORD $74565 // 45230100 WORD $74565 // 45230100
BREAK R4, result+16(FP) // 64600006
BREAK R4, 1(R5) // a4040006
BREAK // 00002a00 BREAK // 00002a00
UNDEF // 00002a00 UNDEF // 00002a00

View File

@ -263,6 +263,7 @@ var optab = []Optab{
{ASLLV, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0}, {ASLLV, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0}, {ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0},
{ASYSCALL, C_ANDCON, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0},
{ABEQ, C_REG, C_REG, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0}, {ABEQ, C_REG, C_REG, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0},
{ABEQ, C_REG, C_NONE, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0}, {ABEQ, C_REG, C_NONE, C_NONE, C_SBRA, C_NONE, 6, 4, 0, 0},
@ -354,16 +355,10 @@ var optab = []Optab{
{ATEQ, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 15, 8, 0, 0}, {ATEQ, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 15, 8, 0, 0},
{ATEQ, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 15, 8, 0, 0}, {ATEQ, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 15, 8, 0, 0},
{ABREAK, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, // really CACHE instruction
{ABREAK, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
{ABREAK, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{ABREAK, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0},
{ARDTIMELW, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0}, {ARDTIMELW, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0},
{ARDTIMEHW, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0},
{ARDTIMED, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0},
{obj.AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0}, {ANOOP, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0},
{obj.APCALIGN, C_SCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, {obj.APCALIGN, C_SCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0},
{obj.APCDATA, C_LCON, C_NONE, C_NONE, C_LCON, C_NONE, 0, 0, 0, 0}, {obj.APCDATA, C_LCON, C_NONE, C_NONE, C_LCON, C_NONE, 0, 0, 0, 0},
{obj.APCDATA, C_DCON, C_NONE, C_NONE, C_DCON, C_NONE, 0, 0, 0, 0}, {obj.APCDATA, C_DCON, C_NONE, C_NONE, C_DCON, C_NONE, 0, 0, 0, 0},
@ -567,7 +562,7 @@ func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
v := pcAlignPadLength(c.ctxt, p.Pc, alignedValue) v := pcAlignPadLength(c.ctxt, p.Pc, alignedValue)
for i = 0; i < int32(v/4); i++ { for i = 0; i < int32(v/4); i++ {
// emit ANOOP instruction by the padding size // emit ANOOP instruction by the padding size
c.ctxt.Arch.ByteOrder.PutUint32(bp, c.oprrr(ANOOP)) c.ctxt.Arch.ByteOrder.PutUint32(bp, OP_12IRR(c.opirr(AAND), 0, 0, 0))
bp = bp[4:] bp = bp[4:]
} }
continue continue
@ -1130,7 +1125,7 @@ func buildop(ctxt *obj.Link) {
case ASYSCALL: case ASYSCALL:
opset(ADBAR, r0) opset(ADBAR, r0)
opset(ANOOP, r0) opset(ABREAK, r0)
case ACMPEQF: case ACMPEQF:
opset(ACMPGTF, r0) opset(ACMPGTF, r0)
@ -1152,7 +1147,6 @@ func buildop(ctxt *obj.Link) {
AMOVD, AMOVD,
AMOVF, AMOVF,
AMOVV, AMOVV,
ABREAK,
ARFE, ARFE,
AJAL, AJAL,
AJMP, AJMP,
@ -1164,12 +1158,8 @@ func buildop(ctxt *obj.Link) {
ANEGW, ANEGW,
ANEGV, ANEGV,
AWORD, AWORD,
ARDTIMELW,
ARDTIMEHW,
ARDTIMED,
obj.ANOP, obj.ANOP,
obj.ATEXT, obj.ATEXT,
obj.AUNDEF,
obj.AFUNCDATA, obj.AFUNCDATA,
obj.APCALIGN, obj.APCALIGN,
obj.APCDATA, obj.APCDATA,
@ -1177,6 +1167,10 @@ func buildop(ctxt *obj.Link) {
obj.ADUFFCOPY: obj.ADUFFCOPY:
break break
case ARDTIMELW:
opset(ARDTIMEHW, r0)
opset(ARDTIMED, r0)
case ACLO: case ACLO:
opset(ACLZ, r0) opset(ACLZ, r0)
@ -1185,6 +1179,9 @@ func buildop(ctxt *obj.Link) {
case AMASKEQZ: case AMASKEQZ:
opset(AMASKNEZ, r0) opset(AMASKNEZ, r0)
case ANOOP:
opset(obj.AUNDEF, r0)
} }
} }
} }
@ -1230,6 +1227,10 @@ func OP_IR(op uint32, i uint32, r2 uint32) uint32 {
return op | (i&0xFFFFF)<<5 | (r2&0x1F)<<0 // ui20, rd5 return op | (i&0xFFFFF)<<5 | (r2&0x1F)<<0 // ui20, rd5
} }
func OP_15I(op uint32, i uint32) uint32 {
return op | (i&0x7FFF)<<0
}
// Encoding for the 'b' or 'bl' instruction. // Encoding for the 'b' or 'bl' instruction.
func OP_B_BL(op uint32, i uint32) uint32 { func OP_B_BL(op uint32, i uint32) uint32 {
return op | ((i & 0xFFFF) << 10) | ((i >> 16) & 0x3FF) return op | ((i & 0xFFFF) << 10) | ((i >> 16) & 0x3FF)
@ -1295,7 +1296,8 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = OP_12IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg)) o1 = OP_12IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg))
case 5: // syscall case 5: // syscall
o1 = c.oprrr(p.As) v := c.regoff(&p.From)
o1 = OP_15I(c.opi(p.As), uint32(v))
case 6: // beq r1,[r2],sbra case 6: // beq r1,[r2],sbra
v := int32(0) v := int32(0)
@ -1439,7 +1441,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
} else { // ATNE } else { // ATNE
o1 = OP_16IRR(c.opirr(ABEQ), uint32(2), uint32(r), uint32(p.To.Reg)) o1 = OP_16IRR(c.opirr(ABEQ), uint32(2), uint32(r), uint32(p.To.Reg))
} }
o2 = c.oprrr(ABREAK) | (uint32(v) & 0x7FFF) o2 = OP_15I(c.opi(ABREAK), uint32(v))
case 16: // sll $c,[r1],r2 case 16: // sll $c,[r1],r2
v := c.regoff(&p.From) v := c.regoff(&p.From)
@ -1609,9 +1611,14 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
a := OP_TEN(8, 1326) // movfr2gr.d a := OP_TEN(8, 1326) // movfr2gr.d
o1 = OP_RR(a, uint32(p.From.Reg), uint32(p.To.Reg)) o1 = OP_RR(a, uint32(p.From.Reg), uint32(p.To.Reg))
case 49: // undef case 49:
o1 = c.oprrr(ABREAK) if p.As == ANOOP {
// andi r0, r0, 0
o1 = OP_12IRR(c.opirr(AAND), 0, 0, 0)
} else {
// undef
o1 = OP_15I(c.opi(ABREAK), 0)
}
// relocation operations // relocation operations
case 50: // mov r,addr ==> pcalau12i + sw case 50: // mov r,addr ==> pcalau12i + sw
o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP)) o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP))
@ -1918,10 +1925,6 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
case AJAL: case AJAL:
return (0x13 << 26) | 1 // jirl r1, rj, 0 return (0x13 << 26) | 1 // jirl r1, rj, 0
case ABREAK:
return 0x54 << 15
case ASYSCALL:
return 0x56 << 15
case ADIVF: case ADIVF:
return 0x20d << 15 return 0x20d << 15
case ADIVD: case ADIVD:
@ -1995,12 +1998,6 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
return 0x4511 << 10 return 0x4511 << 10
case ASQRTD: case ASQRTD:
return 0x4512 << 10 return 0x4512 << 10
case ADBAR:
return 0x70e4 << 15
case ANOOP:
// andi r0, r0, 0
return 0x03400000
} }
if a < 0 { if a < 0 {
@ -2029,6 +2026,21 @@ func (c *ctxt0) oprr(a obj.As) uint32 {
return 0 return 0
} }
func (c *ctxt0) opi(a obj.As) uint32 {
switch a {
case ASYSCALL:
return 0x56 << 15
case ABREAK:
return 0x54 << 15
case ADBAR:
return 0x70e4 << 15
}
c.ctxt.Diag("bad ic opcode %v", a)
return 0
}
func (c *ctxt0) opir(a obj.As) uint32 { func (c *ctxt0) opir(a obj.As) uint32 {
switch a { switch a {
case ALU12IW: case ALU12IW:
@ -2125,10 +2137,6 @@ func (c *ctxt0) opirr(a obj.As) uint32 {
return 0x0be << 22 return 0x0be << 22
case AMOVVR: case AMOVVR:
return 0x0bf << 22 return 0x0bf << 22
case ABREAK:
return 0x018 << 22
case -AMOVWL: case -AMOVWL:
return 0x0b8 << 22 return 0x0b8 << 22
case -AMOVWR: case -AMOVWR: