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cmd/compile: rewrite upper-bit-clear idiom to use shift-rotate
Old buggy hardware incorrectly executes the shift-left-K then shift-right-K idiom for clearing K leftmost bits. Use a right rotate instead of shift to avoid triggering the bug. Fixes #19809. Change-Id: I6dc646b183c29e9d01aef944729f34388dcc687d Reviewed-on: https://go-review.googlesource.com/39310 Run-TryBot: David Chase <drchase@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Russ Cox <rsc@golang.org>
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@ -1190,6 +1190,9 @@
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( ORshiftRL <t> [c] (SLLconst x [32-c]) (MOVWUreg x)) && c < 32 && t.Size() == 4 -> (RORWconst [ c] x)
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(XORshiftRL <t> [c] (SLLconst x [32-c]) (MOVWUreg x)) && c < 32 && t.Size() == 4 -> (RORWconst [ c] x)
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// Replace SRL-of-SLL with ROR-of-SLL to avoid hardware bug.
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(SRLconst [c] y:(SLLconst [c] _)) && c <= 8 -> (RORconst [c] y)
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// do combined loads
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// little endian loads
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// b[0] | b[1]<<8 -> load 16-bit
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@ -8094,6 +8094,26 @@ func rewriteValueARM64_OpARM64SRLconst(v *Value) bool {
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v.AuxInt = int64(uint64(d) >> uint64(c))
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return true
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}
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// match: (SRLconst [c] y:(SLLconst [c] _))
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// cond: c <= 8
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// result: (RORconst [c] y)
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for {
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c := v.AuxInt
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y := v.Args[0]
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if y.Op != OpARM64SLLconst {
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break
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}
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if y.AuxInt != c {
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break
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}
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if !(c <= 8) {
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break
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}
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v.reset(OpARM64RORconst)
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v.AuxInt = c
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v.AddArg(y)
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return true
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}
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return false
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}
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func rewriteValueARM64_OpARM64SUB(v *Value) bool {
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