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cmd/compile: fix mips64 instruction UNPREDICTABLE bug

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Replace addu with a sll instruction with a definite behavior (sll will discard the upper 32 bits of the 64 bits, then do sign extensions, with certain behavior). It won't have any UNPREDICTABLE expectation.

Fixes #30459

Change-Id: Id79085c28c5cc4f86939b4ef08ef4bff46077c45
GitHub-Last-Rev: 03569796a9
GitHub-Pull-Request: golang/go#30461
Reviewed-on: https://go-review.googlesource.com/c/go/+/164758
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
This commit is contained in:
hengwu0 2019-03-05 01:24:35 +00:00 committed by Cherry Zhang
parent ab0c9510a9
commit 95d4e6158b
1 changed files with 4 additions and 2 deletions
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6
src/cmd/internal/obj/mips/asm0.go
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@ -1120,9 +1120,11 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
case 1: /* mov r1,r2 ==> OR r1,r0,r2 */
a := AOR
if p.As == AMOVW && c.ctxt.Arch.Family == sys.MIPS64 {
a = AADDU // sign-extended to high 32 bits
// on MIPS64, most of the 32-bit instructions have unpredictable behavior,
// but SLL is special that the result is always sign-extended to 64-bit.
a = ASLL
}
o1 = OP_RRR(c.oprrr(a), uint32(REGZERO), uint32(p.From.Reg), uint32(p.To.Reg))
o1 = OP_RRR(c.oprrr(a), uint32(p.From.Reg), uint32(REGZERO), uint32(p.To.Reg))
case 2: /* add/sub r1,[r2],r3 */
r := int(p.Reg)