qbit/go
1
0
Fork 0
mirror of https://github.com/golang/go synced 2024-11-22 04:04:40 -07:00
Code Releases Activity

cmd/internal/obj/loong64, cmd/asm: remove useless instructions

Browse Source 
Change-Id: I180c40898672a757d72cd0ef38e6e8cc20dc4c3d
Reviewed-on: https://go-review.googlesource.com/c/go/+/565618
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
This commit is contained in:
limeidan 2024-01-06 11:35:48 +08:00 committed by abner chenc
parent 5881c41e7f
commit 8b51146c69
4 changed files with 0 additions and 56 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
src/cmd/asm/internal/asm/testdata/loong64enc1.s vendored
View File

@ -63,15 +63,11 @@ lable2:
MOVV R4, result+16(FP) // 6460c029 MOVV R4, result+16(FP) // 6460c029
MOVB R4, result+16(FP) // 64600029 MOVB R4, result+16(FP) // 64600029
MOVBU R4, result+16(FP) // 64600029 MOVBU R4, result+16(FP) // 64600029
MOVWL R4, result+16(FP) // 6460002f
MOVVL R4, result+16(FP) // 6460802f
MOVW R4, 1(R5) // a4048029 MOVW R4, 1(R5) // a4048029
MOVWU R4, 1(R5) // a4048029 MOVWU R4, 1(R5) // a4048029
MOVV R4, 1(R5) // a404c029 MOVV R4, 1(R5) // a404c029
MOVB R4, 1(R5) // a4040029 MOVB R4, 1(R5) // a4040029
MOVBU R4, 1(R5) // a4040029 MOVBU R4, 1(R5) // a4040029
MOVWL R4, 1(R5) // a404002f
MOVVL R4, 1(R5) // a404802f
SC R4, 1(R5) // a4040021 SC R4, 1(R5) // a4040021
SCV R4, 1(R5) // a4040023 SCV R4, 1(R5) // a4040023
MOVW y+8(FP), R4 // 64408028 MOVW y+8(FP), R4 // 64408028
@ -79,15 +75,11 @@ lable2:
MOVV y+8(FP), R4 // 6440c028 MOVV y+8(FP), R4 // 6440c028
MOVB y+8(FP), R4 // 64400028 MOVB y+8(FP), R4 // 64400028
MOVBU y+8(FP), R4 // 6440002a MOVBU y+8(FP), R4 // 6440002a
MOVWL y+8(FP), R4 // 6440002e
MOVVL y+8(FP), R4 // 6440802e
MOVW 1(R5), R4 // a4048028 MOVW 1(R5), R4 // a4048028
MOVWU 1(R5), R4 // a404802a MOVWU 1(R5), R4 // a404802a
MOVV 1(R5), R4 // a404c028 MOVV 1(R5), R4 // a404c028
MOVB 1(R5), R4 // a4040028 MOVB 1(R5), R4 // a4040028
MOVBU 1(R5), R4 // a404002a MOVBU 1(R5), R4 // a404002a
MOVWL 1(R5), R4 // a404002e
MOVVL 1(R5), R4 // a404802e
LL 1(R5), R4 // a4040020 LL 1(R5), R4 // a4040020
LLV 1(R5), R4 // a4040022 LLV 1(R5), R4 // a4040022
MOVW $4(R4), R5 // 8510c002 MOVW $4(R4), R5 // 8510c002
@ -210,11 +202,6 @@ lable2:
DBAR // 00007238 DBAR // 00007238
NOOP // 00004003 NOOP // 00004003
MOVWR R4, result+16(FP) // 6460402f
MOVWR R4, 1(R5) // a404402f
MOVWR y+8(FP), R4 // 6440402e
MOVWR 1(R5), R4 // a404402e
CMPEQF F4, F5, FCC0 // a010120c CMPEQF F4, F5, FCC0 // a010120c
CMPGTF F4, F5, FCC1 // a190110c CMPGTF F4, F5, FCC1 // a190110c
CMPGTD F4, F5, FCC2 // a290210c CMPGTD F4, F5, FCC2 // a290210c

5
src/cmd/internal/obj/loong64/a.out.go
View File

@ -302,9 +302,6 @@ const (
AMOVWD AMOVWD
AMOVWF AMOVWF
AMOVWL
AMOVWR
AMUL AMUL
AMULD AMULD
AMULF AMULF
@ -359,8 +356,6 @@ const (
// 64-bit // 64-bit
AMOVV AMOVV
AMOVVL
AMOVVR
ASLLV ASLLV
ASRAV ASRAV

4
src/cmd/internal/obj/loong64/anames.go
View File

@ -61,8 +61,6 @@ var Anames = []string{
"MOVW", "MOVW",
"MOVWD", "MOVWD",
"MOVWF", "MOVWF",
"MOVWL",
"MOVWR",
"MUL", "MUL",
"MULD", "MULD",
"MULF", "MULF",
@ -104,8 +102,6 @@ var Anames = []string{
"MASKEQZ", "MASKEQZ",
"MASKNEZ", "MASKNEZ",
"MOVV", "MOVV",
"MOVVL",
"MOVVR",
"SLLV", "SLLV",
"SRAV", "SRAV",
"SRLV", "SRLV",

34
src/cmd/internal/obj/loong64/asm.go
View File

@ -95,22 +95,16 @@ var optab = []Optab{
{AMOVV, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, {AMOVV, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0},
{AMOVB, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, {AMOVB, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0},
{AMOVBU, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0}, {AMOVBU, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0},
{AMOVWL, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0},
{AMOVVL, C_REG, C_NONE, C_NONE, C_SEXT, C_NONE, 7, 4, 0, 0},
{AMOVW, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, {AMOVW, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
{AMOVWU, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, {AMOVWU, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
{AMOVV, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, {AMOVV, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
{AMOVB, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, {AMOVB, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
{AMOVBU, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, {AMOVBU, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
{AMOVWL, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
{AMOVVL, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
{AMOVW, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, {AMOVW, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{AMOVWU, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, {AMOVWU, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{AMOVV, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, {AMOVV, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{AMOVB, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, {AMOVB, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{AMOVBU, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, {AMOVBU, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{AMOVWL, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{AMOVVL, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{ASC, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, {ASC, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
{ASCV, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0}, {ASCV, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 7, 4, REGZERO, 0},
@ -119,22 +113,16 @@ var optab = []Optab{
{AMOVV, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, {AMOVV, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0},
{AMOVB, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, {AMOVB, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0},
{AMOVBU, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0}, {AMOVBU, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0},
{AMOVWL, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0},
{AMOVVL, C_SEXT, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, 0, 0},
{AMOVW, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, {AMOVW, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0},
{AMOVWU, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, {AMOVWU, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0},
{AMOVV, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, {AMOVV, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0},
{AMOVB, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, {AMOVB, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0},
{AMOVBU, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0}, {AMOVBU, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0},
{AMOVWL, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0},
{AMOVVL, C_SAUTO, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGSP, 0},
{AMOVW, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, {AMOVW, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
{AMOVWU, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, {AMOVWU, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
{AMOVV, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, {AMOVV, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
{AMOVB, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, {AMOVB, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
{AMOVBU, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, {AMOVBU, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
{AMOVWL, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
{AMOVVL, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
{ALL, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, {ALL, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
{ALLV, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0}, {ALLV, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 8, 4, REGZERO, 0},
@ -1189,12 +1177,6 @@ func buildop(ctxt *obj.Link) {
case ABFPT: case ABFPT:
opset(ABFPF, r0) opset(ABFPF, r0)
case AMOVWL:
opset(AMOVWR, r0)
case AMOVVL:
opset(AMOVVR, r0)
case AMOVW, case AMOVW,
AMOVD, AMOVD,
AMOVF, AMOVF,
@ -2173,22 +2155,6 @@ func (c *ctxt0) opirr(a obj.As) uint32 {
return 0x0ad << 22 return 0x0ad << 22
case AMOVD: case AMOVD:
return 0x0af << 22 return 0x0af << 22
case AMOVWL:
return 0x0bc << 22
case AMOVWR:
return 0x0bd << 22
case AMOVVL:
return 0x0be << 22
case AMOVVR:
return 0x0bf << 22
case -AMOVWL:
return 0x0b8 << 22
case -AMOVWR:
return 0x0b9 << 22
case -AMOVVL:
return 0x0ba << 22
case -AMOVVR:
return 0x0bb << 22
case -AMOVB: case -AMOVB:
return 0x0a0 << 22 return 0x0a0 << 22
case -AMOVBU: case -AMOVBU: