qbit/go
1
0
Fork 0
mirror of https://github.com/golang/go synced 2024-11-23 12:00:14 -07:00
Code Releases Activity

internal/cpu: update arm64 cpu features

Browse Source 
Follow the Linux Kernel 4.15
Add Arm64 minimalFeatures test

Change-Id: I1c092521ba59b1e4096c27786fa0464f9ef7d311
Reviewed-on: https://go-review.googlesource.com/103636
Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
This commit is contained in:
Meng Zhuo 2018-03-31 10:07:03 +08:00 committed by Brad Fitzpatrick
parent 55732ad839
commit 8a525b8e7f
3 changed files with 76 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
src/internal/cpu/cpu.go
View File

@ -63,17 +63,32 @@ var ARM64 arm64
// The booleans in arm64 contain the correspondingly named cpu feature bit.
// The struct is padded to avoid false sharing.
type arm64 struct {
_ [CacheLineSize]byte
HasFP bool
HasASIMD bool
HasEVTSTRM bool
HasAES bool
HasPMULL bool
HasSHA1 bool
HasSHA2 bool
HasCRC32 bool
HasATOMICS bool
_ [CacheLineSize]byte
_ [CacheLineSize]byte
HasFP bool
HasASIMD bool
HasEVTSTRM bool
HasAES bool
HasPMULL bool
HasSHA1 bool
HasSHA2 bool
HasCRC32 bool
HasATOMICS bool
HasFPHP bool
HasASIMDHP bool
HasCPUID bool
HasASIMDRDM bool
HasJSCVT bool
HasFCMA bool
HasLRCPC bool
HasDCPOP bool
HasSHA3 bool
HasSM3 bool
HasSM4 bool
HasASIMDDP bool
HasSHA512 bool
HasSVE bool
HasASIMDFHM bool
_ [CacheLineSize]byte
}
var S390X s390x

48
src/internal/cpu/cpu_arm64.go
View File

@ -16,15 +16,30 @@ var arm64_hwcap2 uint
// HWCAP/HWCAP2 bits. These are exposed by Linux.
const (
hwcap_FP = (1 << 0)
hwcap_ASIMD = (1 << 1)
hwcap_EVTSTRM = (1 << 2)
hwcap_AES = (1 << 3)
hwcap_PMULL = (1 << 4)
hwcap_SHA1 = (1 << 5)
hwcap_SHA2 = (1 << 6)
hwcap_CRC32 = (1 << 7)
hwcap_ATOMICS = (1 << 8)
hwcap_FP = (1 << 0)
hwcap_ASIMD = (1 << 1)
hwcap_EVTSTRM = (1 << 2)
hwcap_AES = (1 << 3)
hwcap_PMULL = (1 << 4)
hwcap_SHA1 = (1 << 5)
hwcap_SHA2 = (1 << 6)
hwcap_CRC32 = (1 << 7)
hwcap_ATOMICS = (1 << 8)
hwcap_FPHP = (1 << 9)
hwcap_ASIMDHP = (1 << 10)
hwcap_CPUID = (1 << 11)
hwcap_ASIMDRDM = (1 << 12)
hwcap_JSCVT = (1 << 13)
hwcap_FCMA = (1 << 14)
hwcap_LRCPC = (1 << 15)
hwcap_DCPOP = (1 << 16)
hwcap_SHA3 = (1 << 17)
hwcap_SM3 = (1 << 18)
hwcap_SM4 = (1 << 19)
hwcap_ASIMDDP = (1 << 20)
hwcap_SHA512 = (1 << 21)
hwcap_SVE = (1 << 22)
hwcap_ASIMDFHM = (1 << 23)
)
func init() {
@ -38,6 +53,21 @@ func init() {
ARM64.HasSHA2 = isSet(arm64_hwcap, hwcap_SHA2)
ARM64.HasCRC32 = isSet(arm64_hwcap, hwcap_CRC32)
ARM64.HasATOMICS = isSet(arm64_hwcap, hwcap_ATOMICS)
ARM64.HasFPHP = isSet(arm64_hwcap, hwcap_FPHP)
ARM64.HasASIMDHP = isSet(arm64_hwcap, hwcap_ASIMDHP)
ARM64.HasCPUID = isSet(arm64_hwcap, hwcap_CPUID)
ARM64.HasASIMDRDM = isSet(arm64_hwcap, hwcap_ASIMDRDM)
ARM64.HasJSCVT = isSet(arm64_hwcap, hwcap_JSCVT)
ARM64.HasFCMA = isSet(arm64_hwcap, hwcap_FCMA)
ARM64.HasLRCPC = isSet(arm64_hwcap, hwcap_LRCPC)
ARM64.HasDCPOP = isSet(arm64_hwcap, hwcap_DCPOP)
ARM64.HasSHA3 = isSet(arm64_hwcap, hwcap_SHA3)
ARM64.HasSM3 = isSet(arm64_hwcap, hwcap_SM3)
ARM64.HasSM4 = isSet(arm64_hwcap, hwcap_SM4)
ARM64.HasASIMDDP = isSet(arm64_hwcap, hwcap_ASIMDDP)
ARM64.HasSHA512 = isSet(arm64_hwcap, hwcap_SHA512)
ARM64.HasSVE = isSet(arm64_hwcap, hwcap_SVE)
ARM64.HasASIMDFHM = isSet(arm64_hwcap, hwcap_ASIMDFHM)
}
func isSet(hwc uint, value uint) bool {

11
src/internal/cpu/cpu_test.go
View File

@ -48,3 +48,14 @@ func TestPPC64minimalFeatures(t *testing.T) {
}
}
}
func TestARM64minimalFeatures(t *testing.T) {
if runtime.GOARCH == "arm64" {
if !cpu.ARM64.HasASIMD {
t.Fatalf("HasASIMD expected true, got false")
}
if !cpu.ARM64.HasFP {
t.Fatalf("HasFP expected true, got false")
}
}
}