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cmd/compile: improve SignExt32to64 on riscv64

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SignExt32to64 can be implemented with a single ADDIW instruction, rather than
the two shifts that are in use currently.

Change-Id: Ie1bbaef4018f1ba5162773fc64fa5a887457cfc9
Reviewed-on: https://go-review.googlesource.com/c/go/+/220922
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
This commit is contained in:
Joel Sing 2020-02-26 04:00:10 +11:00
parent 44286d09c5
commit 8955a56da0
5 changed files with 22 additions and 11 deletions
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2
src/cmd/compile/internal/riscv64/ssa.go
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@ -256,7 +256,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
p.From.Reg = v.Args[0].Reg()
p.To.Type = obj.TYPE_REG
p.To.Reg = v.Reg()
case ssa.OpRISCV64ADDI, ssa.OpRISCV64XORI, ssa.OpRISCV64ORI, ssa.OpRISCV64ANDI,
case ssa.OpRISCV64ADDI, ssa.OpRISCV64ADDIW, ssa.OpRISCV64XORI, ssa.OpRISCV64ORI, ssa.OpRISCV64ANDI,
ssa.OpRISCV64SLLI, ssa.OpRISCV64SRAI, ssa.OpRISCV64SRLI, ssa.OpRISCV64SLTI,
ssa.OpRISCV64SLTIU:
p := s.Prog(v.Op.Asm())

2
src/cmd/compile/internal/ssa/gen/RISCV64.rules
View File

@ -109,7 +109,7 @@
(SignExt8to64 <t> x) -> (SRAI [56] (SLLI <t> [56] x))
(SignExt16to32 <t> x) -> (SRAI [48] (SLLI <t> [48] x))
(SignExt16to64 <t> x) -> (SRAI [48] (SLLI <t> [48] x))
(SignExt32to64 <t> x) -> (SRAI [32] (SLLI <t> [32] x))
(SignExt32to64 <t> x) -> (ADDIW [0] x)
(ZeroExt8to16 <t> x) -> (SRLI [56] (SLLI <t> [56] x))
(ZeroExt8to32 <t> x) -> (SRLI [56] (SLLI <t> [56] x))

1
src/cmd/compile/internal/ssa/gen/RISCV64Ops.go
View File

@ -129,6 +129,7 @@ func init() {
RISCV64ops := []opData{
{name: "ADD", argLength: 2, reg: gp21, asm: "ADD", commutative: true}, // arg0 + arg1
{name: "ADDI", argLength: 1, reg: gp11sb, asm: "ADDI", aux: "Int64"}, // arg0 + auxint
{name: "ADDIW", argLength: 1, reg: gp11, asm: "ADDIW", aux: "Int64"}, // 32 low bits of arg0 + auxint, sign extended to 64 bits
{name: "SUB", argLength: 2, reg: gp21, asm: "SUB"}, // arg0 - arg1
{name: "SUBW", argLength: 2, reg: gp21, asm: "SUBW"}, // 32 low bits of arg 0 - 32 low bits of arg 1, sign extended to 64 bits

15
src/cmd/compile/internal/ssa/opGen.go
View File

@ -1884,6 +1884,7 @@ const (
OpRISCV64ADD
OpRISCV64ADDI
OpRISCV64ADDIW
OpRISCV64SUB
OpRISCV64SUBW
OpRISCV64MUL
@ -25015,6 +25016,20 @@ var opcodeTable = [...]opInfo{
},
},
},
{
name: "ADDIW",
auxType: auxInt64,
argLen: 1,
asm: riscv.AADDIW,
reg: regInfo{
inputs: []inputInfo{
{0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30
},
outputs: []outputInfo{
{0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30
},
},
},
{
name: "SUB",
argLen: 2,

13
src/cmd/compile/internal/ssa/rewriteRISCV64.go
View File

@ -4109,18 +4109,13 @@ func rewriteValueRISCV64_OpSignExt16to64(v *Value) bool {
}
func rewriteValueRISCV64_OpSignExt32to64(v *Value) bool {
v_0 := v.Args[0]
b := v.Block
// match: (SignExt32to64 <t> x)
// result: (SRAI [32] (SLLI <t> [32] x))
// result: (ADDIW [0] x)
for {
t := v.Type
x := v_0
v.reset(OpRISCV64SRAI)
v.AuxInt = 32
v0 := b.NewValue0(v.Pos, OpRISCV64SLLI, t)
v0.AuxInt = 32
v0.AddArg(x)
v.AddArg(v0)
v.reset(OpRISCV64ADDIW)
v.AuxInt = 0
v.AddArg(x)
return true
}
}