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cmd/asm: update to use new encoding for x86 instructions
Support the old syntax for AX:DX by rewriting into the new form, AX, DX. Delete now-unnecessary hacks for some special cases. Change-Id: Icd42697c7617f8a50864ca8b0c69469321a2296e Reviewed-on: https://go-review.googlesource.com/6901 Reviewed-by: Russ Cox <rsc@golang.org>
This commit is contained in:
Rob Pike
parent
59584ede73
commit
845c4ff52a
@ -460,17 +460,6 @@ func (p *Parser) asmInstruction(op int, cond string, a []obj.Addr) {
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prog.From = a[0]
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prog.To = a[1]
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switch p.arch.Thechar {
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case '6', '8':
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// DX:AX as a register pair can only appear on the RHS.
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// Bizarrely, to obj it's specified by setting index on the LHS.
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// TODO: can we fix this?
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if a[1].Reg2 != 0 {
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if a[0].Reg2 != 0 {
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p.errorf("register pair must be on LHS")
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}
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prog.From.Index = int16(a[1].Reg2)
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prog.To.Reg2 = 0
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}
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case '9':
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var reg0, reg1 int16
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// Handle (R1+R2)
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@ -488,7 +477,7 @@ func (p *Parser) asmInstruction(op int, cond string, a []obj.Addr) {
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case 3:
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switch p.arch.Thechar {
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case '5':
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// Strange special case.
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// Special cases.
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if arch.IsARMSTREX(op) {
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/*
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STREX x, (y), z
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@ -504,20 +493,9 @@ func (p *Parser) asmInstruction(op int, cond string, a []obj.Addr) {
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prog.Reg = p.getRegister(prog, op, &a[1])
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prog.To = a[2]
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case '6', '8':
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// CMPSD etc.; third operand is imm8, stored in offset, or a register.
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prog.From = a[0]
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prog.To = a[1]
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switch a[2].Type {
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case obj.TYPE_MEM:
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prog.To.Offset = p.getConstant(prog, op, &a[2])
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case obj.TYPE_REG:
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// Strange reordering.
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prog.To = a[2]
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prog.From = a[1]
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prog.To.Offset = p.getImmediate(prog, op, &a[0])
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default:
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p.errorf("expected offset or register for 3rd operand")
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}
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prog.From3 = a[1]
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prog.To = a[2]
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case '9':
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if arch.IsPPC64CMP(op) {
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// CMPW etc.; third argument is a CR register that goes into prog.Reg.
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@ -79,11 +79,9 @@ func TestARMEndToEnd(t *testing.T) {
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}
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func TestAMD64EndToEnd(t *testing.T) {
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t.Skip("broken")
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testEndToEnd(t, "amd64")
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}
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func Test386EndToEnd(t *testing.T) {
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t.Skip("broken")
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testEndToEnd(t, "386")
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}
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@ -41,47 +41,14 @@ func testOperandParser(t *testing.T, parser *Parser, tests []operandTest) {
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}
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}
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func testX86RegisterPair(t *testing.T, parser *Parser) {
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// Special case for AX:DX, which is really two operands so isn't printed correcctly
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// by Aconv, but is OK by the -S output.
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parser.start(lex.Tokenize("AX:BX)"))
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addr := obj.Addr{}
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parser.operand(&addr)
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want := obj.Addr{
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Type: obj.TYPE_REG,
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Reg: parser.arch.Register["AX"],
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Reg2: parser.arch.Register["BX"], // TODO: clean up how this is encoded in parse.go
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}
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if want != addr {
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t.Errorf("AX:DX: expected %+v got %+v", want, addr)
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}
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// Special case for foo(SB):DX, which is really two operands so isn't printed correctly
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// by Aconv, but is OK by the -S output.
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parser.start(lex.Tokenize("foo+4(SB):AX"))
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addr = obj.Addr{}
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parser.operand(&addr)
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want = obj.Addr{
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Type: obj.TYPE_MEM,
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Name: obj.NAME_EXTERN,
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Offset: 4,
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Sym: obj.Linklookup(parser.ctxt, "foo", 0),
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Reg2: parser.arch.Register["AX"], // TODO: clean up how this is encoded in parse.go
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}
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if want != addr {
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t.Errorf("foo+4(SB):AX: expected %+v got %+v", want, addr)
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}
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}
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func TestAMD64OperandParser(t *testing.T) {
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parser := newParser("amd64")
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testOperandParser(t, parser, amd64OperandTests)
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testX86RegisterPair(t, parser)
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}
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func Test386OperandParser(t *testing.T) {
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parser := newParser("386")
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testOperandParser(t, parser, x86OperandTests)
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testX86RegisterPair(t, parser)
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}
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func TestARMOperandParser(t *testing.T) {
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@ -113,7 +80,6 @@ type operandTest struct {
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// Examples collected by scanning all the assembly in the standard repo.
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var amd64OperandTests = []operandTest{
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// {"AX:DX", "AX:DX"}, Handled in TestAMD64OperandParser directly.
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{"$(-1.0)", "$(-1.0)"},
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{"$(0.0)", "$(0.0)"},
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{"$(0x2000000+116)", "$33554548"},
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@ -109,6 +109,7 @@ func (p *Parser) line() bool {
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operands := make([][]lex.Token, 0, 3)
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// Zero or more comma-separated operands, one per loop.
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nesting := 0
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colon := -1
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for tok != '\n' && tok != ';' {
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// Process one operand.
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items := make([]lex.Token, 0, 3)
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@ -135,7 +136,16 @@ func (p *Parser) line() bool {
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p.errorf("unexpected EOF")
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return false
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}
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if tok == '\n' || tok == ';' || (nesting == 0 && tok == ',') {
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// Split operands on comma. Also, the old syntax on x86 for a "register pair"
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// was AX:DX, for which the new syntax is DX, AX. Note the reordering.
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if tok == '\n' || tok == ';' || (nesting == 0 && (tok == ',' || tok == ':')) {
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if tok == ':' {
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// Remember this location so we can swap the operands below.
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if colon >= 0 {
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p.errorf("invalid ':' in operand")
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}
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colon = len(operands)
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}
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break
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}
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if tok == '(' || tok == '[' {
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@ -148,8 +158,13 @@ func (p *Parser) line() bool {
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}
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if len(items) > 0 {
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operands = append(operands, items)
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} else if len(operands) > 0 || tok == ',' {
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// Had a comma with nothing after.
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if colon >= 0 && len(operands) == colon+2 {
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// AX:DX becomes DX, AX.
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operands[colon], operands[colon+1] = operands[colon+1], operands[colon]
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colon = -1
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}
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} else if len(operands) > 0 || tok == ',' || colon >= 0 {
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// Had a separator with nothing after.
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p.errorf("missing operand")
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}
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}
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@ -226,7 +241,7 @@ func (p *Parser) parseScale(s string) int8 {
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// operand parses a general operand and stores the result in *a.
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func (p *Parser) operand(a *obj.Addr) bool {
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// fmt.Printf("Operand: %v\n", p.input)
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//fmt.Printf("Operand: %v\n", p.input)
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if len(p.input) == 0 {
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p.errorf("empty operand: cannot happen")
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return false
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@ -297,6 +312,8 @@ func (p *Parser) operand(a *obj.Addr) bool {
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if r2 != 0 {
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// Form is R1:R2. It is on RHS and the second register
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// needs to go into the LHS. This is a horrible hack. TODO.
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// TODO: If we never see this again, can delete Addr.Reg2.
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panic("cannot happen")
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a.Reg2 = r2
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}
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}
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@ -362,18 +379,8 @@ func (p *Parser) operand(a *obj.Addr) bool {
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// fmt.Printf("offset %d \n", a.Offset)
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}
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// Odd x86 case: sym+4(SB):AX. Have name, colon, register.
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if p.peek() == ':' && a.Name != obj.NAME_NONE && a.Reg2 == 0 && (p.arch.Thechar == '6' || p.arch.Thechar == '8') {
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p.get(':')
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r2, ok := p.registerReference(p.next().String())
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if !ok {
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return false
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}
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a.Reg2 = r2 // TODO: See comment about Reg3 above.
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} else {
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// Register indirection: (reg) or (index*scale). We are on the opening paren.
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p.registerIndirect(a, prefix)
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}
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// Register indirection: (reg) or (index*scale). We are on the opening paren.
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p.registerIndirect(a, prefix)
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// fmt.Printf("DONE %s\n", p.arch.Dconv(&emptyProg, 0, a))
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p.expect(scanner.EOF)
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@ -449,15 +456,10 @@ func (p *Parser) register(name string, prefix rune) (r1, r2 int16, scale int8, o
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}
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c := p.peek()
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if c == ':' || c == ',' || c == '+' {
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// 2nd register; syntax (R1:R2) etc. No two architectures agree.
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// 2nd register; syntax (R1+R2) etc. No two architectures agree.
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// Check the architectures match the syntax.
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char := p.arch.Thechar
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switch p.next().ScanToken {
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case ':':
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if char != '6' && char != '8' {
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p.errorf("illegal register pair syntax")
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return
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}
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case ',':
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if char != '5' {
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p.errorf("illegal register pair syntax")
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98
src/cmd/asm/internal/asm/testdata/386.out
vendored
98
src/cmd/asm/internal/asm/testdata/386.out
vendored
@ -1,49 +1,49 @@
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5 00001 (testdata/386.s:5) TEXT foo(SB),$0
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8 00002 (testdata/386.s:8) SETCC ,AX
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9 00003 (testdata/386.s:9) SETCC ,foo+4(SB)
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12 00004 (testdata/386.s:12) DIVB AX,
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13 00005 (testdata/386.s:13) DIVB foo+4(SB),
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14 00006 (testdata/386.s:14) PUSHL $foo+4(SB),
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15 00007 (testdata/386.s:15) POPL ,AX
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18 00008 (testdata/386.s:18) SUBB $1,AX
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19 00009 (testdata/386.s:19) SUBB $1,foo+4(SB)
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20 00010 (testdata/386.s:20) SUBB BX,AX
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21 00011 (testdata/386.s:21) SUBB BX,foo+4(SB)
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24 00012 (testdata/386.s:24) CMPB AX,$1
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25 00013 (testdata/386.s:25) CMPB foo+4(SB),$4
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26 00014 (testdata/386.s:26) CMPB BX,AX
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27 00015 (testdata/386.s:27) CMPB foo+4(SB),BX
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31 00016 (testdata/386.s:31) JCS ,
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32 00017 (testdata/386.s:32) JCS ,16(PC)
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35 00018 (testdata/386.s:35) CALL ,AX
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36 00019 (testdata/386.s:36) JMP ,AX
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37 00020 (testdata/386.s:37) CALL ,*foo(SB)
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38 00021 (testdata/386.s:38) JMP ,$4
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39 00022 (testdata/386.s:39) JMP ,16
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40 00023 (testdata/386.s:40) CALL ,foo(SB)
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42 00024 (testdata/386.s:42) CALL ,foo+4(SB)(AX*4)
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43 00025 (testdata/386.s:43) CALL ,4(SP)
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44 00026 (testdata/386.s:44) CALL ,(AX)
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45 00027 (testdata/386.s:45) CALL ,(SP)
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47 00028 (testdata/386.s:47) CALL ,(AX)(AX*4)
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48 00029 (testdata/386.s:48) CALL ,4(SP)
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49 00030 (testdata/386.s:49) CALL ,(AX)
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50 00031 (testdata/386.s:50) CALL ,(SP)
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52 00032 (testdata/386.s:52) JMP ,(AX)(AX*4)
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55 00033 (testdata/386.s:55) NOP ,
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56 00034 (testdata/386.s:56) NOP AX,
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57 00035 (testdata/386.s:57) NOP foo+4(SB),
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60 00036 (testdata/386.s:60) SHLL $4,BX
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61 00037 (testdata/386.s:61) SHLL $4,foo+4(SB)
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62 00038 (testdata/386.s:62) SHLL $4,foo+4(SB):AX
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65 00039 (testdata/386.s:65) MOVL AX,BX
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66 00040 (testdata/386.s:66) MOVL $4,BX
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69 00041 (testdata/386.s:69) IMULL AX,
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70 00042 (testdata/386.s:70) IMULL $4,CX
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71 00043 (testdata/386.s:71) IMULL AX,BX
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74 00044 (testdata/386.s:74) CMPPD X0,$4,X1
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75 00045 (testdata/386.s:75) CMPPD X0,foo+4(SB)
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78 00046 (testdata/386.s:78) PINSRD (AX),$1,X0
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79 00047 (testdata/386.s:79) PINSRD foo+4(FP),$2,X0
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83 00048 (testdata/386.s:83) LOOP ,
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86 00049 (testdata/386.s:86) RET ,
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5 00001 (testdata/386.s:5) TEXT foo(SB), $0
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8 00002 (testdata/386.s:8) SETCC AX
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9 00003 (testdata/386.s:9) SETCC foo+4(SB)
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12 00004 (testdata/386.s:12) DIVB AX
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13 00005 (testdata/386.s:13) DIVB foo+4(SB)
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14 00006 (testdata/386.s:14) PUSHL $foo+4(SB)
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15 00007 (testdata/386.s:15) POPL AX
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18 00008 (testdata/386.s:18) SUBB $1, AX
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19 00009 (testdata/386.s:19) SUBB $1, foo+4(SB)
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20 00010 (testdata/386.s:20) SUBB BX, AX
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21 00011 (testdata/386.s:21) SUBB BX, foo+4(SB)
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24 00012 (testdata/386.s:24) CMPB AX, $1
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25 00013 (testdata/386.s:25) CMPB foo+4(SB), $4
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26 00014 (testdata/386.s:26) CMPB BX, AX
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27 00015 (testdata/386.s:27) CMPB foo+4(SB), BX
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31 00016 (testdata/386.s:31) JCS
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32 00017 (testdata/386.s:32) JCS 16(PC)
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35 00018 (testdata/386.s:35) CALL AX
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36 00019 (testdata/386.s:36) JMP AX
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37 00020 (testdata/386.s:37) CALL *foo(SB)
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38 00021 (testdata/386.s:38) JMP $4
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39 00022 (testdata/386.s:39) JMP 16
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40 00023 (testdata/386.s:40) CALL foo(SB)
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42 00024 (testdata/386.s:42) CALL foo+4(SB)(AX*4)
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43 00025 (testdata/386.s:43) CALL 4(SP)
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44 00026 (testdata/386.s:44) CALL (AX)
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45 00027 (testdata/386.s:45) CALL (SP)
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47 00028 (testdata/386.s:47) CALL (AX)(AX*4)
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48 00029 (testdata/386.s:48) CALL 4(SP)
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49 00030 (testdata/386.s:49) CALL (AX)
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50 00031 (testdata/386.s:50) CALL (SP)
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52 00032 (testdata/386.s:52) JMP (AX)(AX*4)
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55 00033 (testdata/386.s:55) NOP
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56 00034 (testdata/386.s:56) NOP AX
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57 00035 (testdata/386.s:57) NOP foo+4(SB)
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60 00036 (testdata/386.s:60) SHLL $4, BX
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61 00037 (testdata/386.s:61) SHLL $4, foo+4(SB)
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62 00038 (testdata/386.s:62) SHLL $4, AX, foo+4(SB)
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65 00039 (testdata/386.s:65) MOVL AX, BX
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66 00040 (testdata/386.s:66) MOVL $4, BX
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69 00041 (testdata/386.s:69) IMULL AX
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70 00042 (testdata/386.s:70) IMULL $4, CX
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71 00043 (testdata/386.s:71) IMULL AX, BX
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74 00044 (testdata/386.s:74) CMPPD X0, X1, 4
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75 00045 (testdata/386.s:75) CMPPD X0, foo+4(SB), 4
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78 00046 (testdata/386.s:78) PINSRD $1, (AX), X0
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79 00047 (testdata/386.s:79) PINSRD $2, foo+4(FP), X0
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83 00048 (testdata/386.s:83) LOOP
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86 00049 (testdata/386.s:86) RET
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114
src/cmd/asm/internal/asm/testdata/amd64.out
vendored
114
src/cmd/asm/internal/asm/testdata/amd64.out
vendored
@ -1,57 +1,57 @@
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5 00001 (testdata/amd64.s:5) TEXT foo(SB),$0
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8 00002 (testdata/amd64.s:8) NEGQ ,R11
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9 00003 (testdata/amd64.s:9) NEGQ ,4(R11)
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10 00004 (testdata/amd64.s:10) NEGQ ,foo+4(SB)
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13 00005 (testdata/amd64.s:13) INT $4,
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14 00006 (testdata/amd64.s:14) DIVB R11,
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15 00007 (testdata/amd64.s:15) DIVB 4(R11),
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16 00008 (testdata/amd64.s:16) DIVB foo+4(SB),
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19 00009 (testdata/amd64.s:19) SUBQ $4,DI
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20 00010 (testdata/amd64.s:20) SUBQ R11,DI
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21 00011 (testdata/amd64.s:21) SUBQ 4(R11),DI
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22 00012 (testdata/amd64.s:22) SUBQ foo+4(SB),DI
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23 00013 (testdata/amd64.s:23) SUBQ $4,8(R12)
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24 00014 (testdata/amd64.s:24) SUBQ R11,8(R12)
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25 00015 (testdata/amd64.s:25) SUBQ R11,foo+4(SB)
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28 00016 (testdata/amd64.s:28) CMPB CX,$4
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32 00017 (testdata/amd64.s:32) JCS ,13(PC)
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33 00018 (testdata/amd64.s:33) JCS ,17
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36 00019 (testdata/amd64.s:36) JMP ,15(PC)
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37 00020 (testdata/amd64.s:37) JMP ,17
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38 00021 (testdata/amd64.s:38) JMP ,foo+4(SB)
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39 00022 (testdata/amd64.s:39) JMP ,bar<>+4(SB)
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40 00023 (testdata/amd64.s:40) JMP ,bar<>+4(SB)(R11*4)
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41 00024 (testdata/amd64.s:41) JMP ,4(SP)
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42 00025 (testdata/amd64.s:42) JMP ,(R12)
|
||||
44 00026 (testdata/amd64.s:44) JMP ,(R12)(R13*4)
|
||||
45 00027 (testdata/amd64.s:45) JMP ,(AX)
|
||||
46 00028 (testdata/amd64.s:46) JMP ,(SP)
|
||||
48 00029 (testdata/amd64.s:48) JMP ,(AX)(AX*4)
|
||||
49 00030 (testdata/amd64.s:49) JMP ,4(SP)
|
||||
50 00031 (testdata/amd64.s:50) JMP ,(R12)
|
||||
52 00032 (testdata/amd64.s:52) JMP ,(R12)(R13*4)
|
||||
53 00033 (testdata/amd64.s:53) JMP ,(AX)
|
||||
54 00034 (testdata/amd64.s:54) JMP ,(SP)
|
||||
56 00035 (testdata/amd64.s:56) JMP ,(AX)(AX*4)
|
||||
57 00036 (testdata/amd64.s:57) JMP ,R13
|
||||
60 00037 (testdata/amd64.s:60) NOP ,
|
||||
61 00038 (testdata/amd64.s:61) NOP AX,
|
||||
62 00039 (testdata/amd64.s:62) NOP foo+4(SB),
|
||||
65 00040 (testdata/amd64.s:65) SHLL R11,R12
|
||||
66 00041 (testdata/amd64.s:66) SHLL R11,foo+4(SB)
|
||||
67 00042 (testdata/amd64.s:67) SHLL R11,R11:AX
|
||||
70 00043 (testdata/amd64.s:70) MOVL AX,R11
|
||||
71 00044 (testdata/amd64.s:71) MOVL $4,R11
|
||||
72 00045 (testdata/amd64.s:72) MOVL AX,AX:CS
|
||||
75 00046 (testdata/amd64.s:75) IMULB $4,
|
||||
76 00047 (testdata/amd64.s:76) IMULB R11,
|
||||
77 00048 (testdata/amd64.s:77) IMULB $4,R11
|
||||
78 00049 (testdata/amd64.s:78) IMULB R11,R12
|
||||
79 00050 (testdata/amd64.s:79) IMULB R11,foo+4(SB)
|
||||
82 00051 (testdata/amd64.s:82) CMPPD R11,$4,R12
|
||||
83 00052 (testdata/amd64.s:83) CMPPD R11,foo+4(SB)
|
||||
86 00053 (testdata/amd64.s:86) PINSRW R11,$4,AX
|
||||
87 00054 (testdata/amd64.s:87) PINSRW foo+4(SB),$4,AX
|
||||
90 00055 (testdata/amd64.s:90) RETFL $4,
|
||||
94 00056 (testdata/amd64.s:94) LOOP ,
|
||||
97 00057 (testdata/amd64.s:97) RET ,
|
||||
5 00001 (testdata/amd64.s:5) TEXT foo(SB), $0
|
||||
8 00002 (testdata/amd64.s:8) NEGQ R11
|
||||
9 00003 (testdata/amd64.s:9) NEGQ 4(R11)
|
||||
10 00004 (testdata/amd64.s:10) NEGQ foo+4(SB)
|
||||
13 00005 (testdata/amd64.s:13) INT $4
|
||||
14 00006 (testdata/amd64.s:14) DIVB R11
|
||||
15 00007 (testdata/amd64.s:15) DIVB 4(R11)
|
||||
16 00008 (testdata/amd64.s:16) DIVB foo+4(SB)
|
||||
19 00009 (testdata/amd64.s:19) SUBQ $4, DI
|
||||
20 00010 (testdata/amd64.s:20) SUBQ R11, DI
|
||||
21 00011 (testdata/amd64.s:21) SUBQ 4(R11), DI
|
||||
22 00012 (testdata/amd64.s:22) SUBQ foo+4(SB), DI
|
||||
23 00013 (testdata/amd64.s:23) SUBQ $4, 8(R12)
|
||||
24 00014 (testdata/amd64.s:24) SUBQ R11, 8(R12)
|
||||
25 00015 (testdata/amd64.s:25) SUBQ R11, foo+4(SB)
|
||||
28 00016 (testdata/amd64.s:28) CMPB CX, $4
|
||||
32 00017 (testdata/amd64.s:32) JCS 13(PC)
|
||||
33 00018 (testdata/amd64.s:33) JCS 17
|
||||
36 00019 (testdata/amd64.s:36) JMP 15(PC)
|
||||
37 00020 (testdata/amd64.s:37) JMP 17
|
||||
38 00021 (testdata/amd64.s:38) JMP foo+4(SB)
|
||||
39 00022 (testdata/amd64.s:39) JMP bar<>+4(SB)
|
||||
40 00023 (testdata/amd64.s:40) JMP bar<>+4(SB)(R11*4)
|
||||
41 00024 (testdata/amd64.s:41) JMP 4(SP)
|
||||
42 00025 (testdata/amd64.s:42) JMP (R12)
|
||||
44 00026 (testdata/amd64.s:44) JMP (R12)(R13*4)
|
||||
45 00027 (testdata/amd64.s:45) JMP (AX)
|
||||
46 00028 (testdata/amd64.s:46) JMP (SP)
|
||||
48 00029 (testdata/amd64.s:48) JMP (AX)(AX*4)
|
||||
49 00030 (testdata/amd64.s:49) JMP 4(SP)
|
||||
50 00031 (testdata/amd64.s:50) JMP (R12)
|
||||
52 00032 (testdata/amd64.s:52) JMP (R12)(R13*4)
|
||||
53 00033 (testdata/amd64.s:53) JMP (AX)
|
||||
54 00034 (testdata/amd64.s:54) JMP (SP)
|
||||
56 00035 (testdata/amd64.s:56) JMP (AX)(AX*4)
|
||||
57 00036 (testdata/amd64.s:57) JMP R13
|
||||
60 00037 (testdata/amd64.s:60) NOP
|
||||
61 00038 (testdata/amd64.s:61) NOP AX
|
||||
62 00039 (testdata/amd64.s:62) NOP foo+4(SB)
|
||||
65 00040 (testdata/amd64.s:65) SHLL R11, R12
|
||||
66 00041 (testdata/amd64.s:66) SHLL R11, foo+4(SB)
|
||||
67 00042 (testdata/amd64.s:67) SHLL R11, AX, R11
|
||||
70 00043 (testdata/amd64.s:70) MOVL AX, R11
|
||||
71 00044 (testdata/amd64.s:71) MOVL $4, R11
|
||||
72 00045 (testdata/amd64.s:72) MOVL AX, CS, AX
|
||||
75 00046 (testdata/amd64.s:75) IMULB $4
|
||||
76 00047 (testdata/amd64.s:76) IMULB R11
|
||||
77 00048 (testdata/amd64.s:77) IMULB $4, R11
|
||||
78 00049 (testdata/amd64.s:78) IMULB R11, R12
|
||||
79 00050 (testdata/amd64.s:79) IMULB R11, foo+4(SB)
|
||||
82 00051 (testdata/amd64.s:82) CMPPD R11, R12, 4
|
||||
83 00052 (testdata/amd64.s:83) CMPPD R11, foo+4(SB), 4
|
||||
86 00053 (testdata/amd64.s:86) PINSRW $4, R11, AX
|
||||
87 00054 (testdata/amd64.s:87) PINSRW $4, foo+4(SB), AX
|
||||
90 00055 (testdata/amd64.s:90) RETFL $4
|
||||
94 00056 (testdata/amd64.s:94) LOOP
|
||||
97 00057 (testdata/amd64.s:97) RET
|
||||
|
||||
2
src/cmd/asm/internal/asm/testdata/amd64.s
vendored
2
src/cmd/asm/internal/asm/testdata/amd64.s
vendored
@ -64,7 +64,7 @@ label:
|
||||
// LTYPES spec5 { outcode($1, &$2); }
|
||||
SHLL R11, R12
|
||||
SHLL R11, foo+4(SB)
|
||||
SHLL R11, R11:AX
|
||||
SHLL R11, R11:AX // Old syntax, still accepted.
|
||||
|
||||
// LTYPEM spec6 { outcode($1, &$2); }
|
||||
MOVL AX, R11
|
||||
|
||||
Loading…
Reference in New Issue
Block a user