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cmd/compile: replace ANDL with MOV?ZX
According to "Intel 64 and IA-32 Architectures Optimization Reference Manual" Section: "3.5.1.13 Zero-Latency MOV Instructions" MOV?ZX instructions have zero latency on newer processors. during make.bash: (ANDLconst [0xFF] x) -> (MOVBQZX x) applies 422 times (ANDLconst [0xFFFF] x) -> (MOVWQZX x) applies 114 times Updates #15105 Change-Id: I10933af599de3c26449c52f4b5cd859331028f39 Reviewed-on: https://go-review.googlesource.com/31639 TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com> Run-TryBot: David Chase <drchase@google.com>
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@ -631,7 +631,9 @@
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(CMPB x (MOVLconst [c])) -> (CMPBconst x [int64(int8(c))])
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(CMPB (MOVLconst [c]) x) -> (InvertFlags (CMPBconst x [int64(int8(c))]))
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// Using MOVBQZX instead of ANDQ is cheaper.
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// Using MOVZX instead of AND is cheaper.
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(ANDLconst [0xFF] x) -> (MOVBQZX x)
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(ANDLconst [0xFFFF] x) -> (MOVWQZX x)
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(ANDQconst [0xFF] x) -> (MOVBQZX x)
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(ANDQconst [0xFFFF] x) -> (MOVWQZX x)
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(ANDQconst [0xFFFFFFFF] x) -> (MOVLQZX x)
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@ -1409,6 +1409,30 @@ func rewriteValueAMD64_OpAMD64ANDLconst(v *Value, config *Config) bool {
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v.AddArg(x)
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return true
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}
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// match: (ANDLconst [0xFF] x)
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// cond:
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// result: (MOVBQZX x)
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for {
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if v.AuxInt != 0xFF {
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break
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}
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x := v.Args[0]
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v.reset(OpAMD64MOVBQZX)
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v.AddArg(x)
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return true
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}
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// match: (ANDLconst [0xFFFF] x)
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// cond:
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// result: (MOVWQZX x)
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for {
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if v.AuxInt != 0xFFFF {
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break
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}
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x := v.Args[0]
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v.reset(OpAMD64MOVWQZX)
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v.AddArg(x)
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return true
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}
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// match: (ANDLconst [c] _)
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// cond: int32(c)==0
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// result: (MOVLconst [0])
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