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https://github.com/golang/go
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cmd/internal/obj: reorder ppc64 MOV* optab entries
These are always sorted and grouped during initialization of the actual opcode -> optab map generation. Thus, their initial location in optab is mostly aimed at readability. This cleanup is intends to ease reviewing of future patches which simplify, combine, or remove MOV* optab entries. Change-Id: I87583ed34fab79e0f625880f419d499939e2a9e1 Reviewed-on: https://go-review.googlesource.com/c/go/+/300612 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Trust: Emmanuel Odeke <emmanuel@orijtech.com>
This commit is contained in:
Paul E. Murphy
Lynn Boger
parent
4350e4961a
commit
7bfe32f39c
@ -94,11 +94,6 @@ var optab = []Optab{
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{as: obj.ATEXT, a1: C_ADDR, a6: C_TEXTSIZE, type_: 0, size: 0},
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{as: obj.ATEXT, a1: C_ADDR, a6: C_TEXTSIZE, type_: 0, size: 0},
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{as: obj.ATEXT, a1: C_ADDR, a3: C_LCON, a6: C_TEXTSIZE, type_: 0, size: 0},
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{as: obj.ATEXT, a1: C_ADDR, a3: C_LCON, a6: C_TEXTSIZE, type_: 0, size: 0},
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/* move register */
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/* move register */
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{as: AMOVD, a1: C_REG, a6: C_REG, type_: 1, size: 4},
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{as: AMOVB, a1: C_REG, a6: C_REG, type_: 12, size: 4},
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{as: AMOVBZ, a1: C_REG, a6: C_REG, type_: 13, size: 4},
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{as: AMOVW, a1: C_REG, a6: C_REG, type_: 12, size: 4},
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{as: AMOVWZ, a1: C_REG, a6: C_REG, type_: 13, size: 4},
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{as: AADD, a1: C_REG, a2: C_REG, a6: C_REG, type_: 2, size: 4},
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{as: AADD, a1: C_REG, a2: C_REG, a6: C_REG, type_: 2, size: 4},
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{as: AADD, a1: C_REG, a6: C_REG, type_: 2, size: 4},
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{as: AADD, a1: C_REG, a6: C_REG, type_: 2, size: 4},
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{as: AADD, a1: C_SCON, a2: C_REG, a6: C_REG, type_: 4, size: 4},
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{as: AADD, a1: C_SCON, a2: C_REG, a6: C_REG, type_: 4, size: 4},
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@ -195,144 +190,177 @@ var optab = []Optab{
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{as: AFADD, a1: C_FREG, a2: C_FREG, a6: C_FREG, type_: 2, size: 4},
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{as: AFADD, a1: C_FREG, a2: C_FREG, a6: C_FREG, type_: 2, size: 4},
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{as: AFABS, a1: C_FREG, a6: C_FREG, type_: 33, size: 4},
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{as: AFABS, a1: C_FREG, a6: C_FREG, type_: 33, size: 4},
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{as: AFABS, a6: C_FREG, type_: 33, size: 4},
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{as: AFABS, a6: C_FREG, type_: 33, size: 4},
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{as: AFMOVD, a1: C_FREG, a6: C_FREG, type_: 33, size: 4},
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{as: AFMADD, a1: C_FREG, a2: C_FREG, a3: C_FREG, a6: C_FREG, type_: 34, size: 4},
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{as: AFMADD, a1: C_FREG, a2: C_FREG, a3: C_FREG, a6: C_FREG, type_: 34, size: 4},
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{as: AFMUL, a1: C_FREG, a6: C_FREG, type_: 32, size: 4},
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{as: AFMUL, a1: C_FREG, a6: C_FREG, type_: 32, size: 4},
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{as: AFMUL, a1: C_FREG, a2: C_FREG, a6: C_FREG, type_: 32, size: 4},
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{as: AFMUL, a1: C_FREG, a2: C_FREG, a6: C_FREG, type_: 32, size: 4},
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/* store, short offset */
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{as: AMOVD, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVW, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVWZ, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVBZ, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVBZU, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVB, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVBU, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVBU, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVD, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
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{as: AMOVW, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
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{as: AMOVWZ, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
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{as: AMOVBZ, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
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{as: AMOVB, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
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{as: AMOVD, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
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{as: AMOVW, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
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{as: AMOVWZ, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
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{as: AMOVBZ, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
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{as: AMOVB, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
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{as: AMOVD, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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{as: AMOVW, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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{as: AMOVWZ, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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{as: AMOVBZ, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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{as: AMOVBZU, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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{as: AMOVB, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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{as: AMOVBU, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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{as: AMOVBU, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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/* load, short offset */
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{as: AMOVD, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVW, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVWZ, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVBZ, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVBZU, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVB, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 9, size: 8},
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{as: AMOVBU, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 9, size: 8},
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{as: AMOVD, a1: C_SEXT, a6: C_REG, type_: 8, size: 4},
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{as: AMOVW, a1: C_SEXT, a6: C_REG, type_: 8, size: 4},
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{as: AMOVWZ, a1: C_SEXT, a6: C_REG, type_: 8, size: 4},
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{as: AMOVBZ, a1: C_SEXT, a6: C_REG, type_: 8, size: 4},
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{as: AMOVB, a1: C_SEXT, a6: C_REG, type_: 9, size: 8},
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{as: AMOVD, a1: C_SAUTO, a6: C_REG, type_: 8, size: 4},
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{as: AMOVW, a1: C_SAUTO, a6: C_REG, type_: 8, size: 4},
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{as: AMOVWZ, a1: C_SAUTO, a6: C_REG, type_: 8, size: 4},
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{as: AMOVBZ, a1: C_SAUTO, a6: C_REG, type_: 8, size: 4},
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{as: AMOVB, a1: C_SAUTO, a6: C_REG, type_: 9, size: 8},
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{as: AMOVD, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVW, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVWZ, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVBZ, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVBZU, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVB, a1: C_SOREG, a6: C_REG, type_: 9, size: 8},
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{as: AMOVBU, a1: C_SOREG, a6: C_REG, type_: 9, size: 8},
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{as: AMOVBU, a1: C_SOREG, a6: C_REG, type_: 9, size: 8},
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{as: AMOVBU, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 9, size: 8},
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/* store, long offset */
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{as: AMOVBZU, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVD, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
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{as: AMOVBZU, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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{as: AMOVW, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
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{as: AMOVBZU, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVWZ, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
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{as: AMOVBZU, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
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{as: AMOVBZ, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
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{as: AMOVB, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
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{as: AMOVD, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
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{as: AMOVW, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
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{as: AMOVWZ, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
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{as: AMOVBZ, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
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{as: AMOVB, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
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{as: AMOVD, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
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{as: AMOVW, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
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{as: AMOVWZ, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
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{as: AMOVBZ, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
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{as: AMOVB, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
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{as: AMOVD, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
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{as: AMOVW, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
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{as: AMOVWZ, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
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{as: AMOVBZ, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
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{as: AMOVB, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
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/* load, long offset */
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{as: AMOVD, a1: C_LEXT, a6: C_REG, type_: 36, size: 8},
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{as: AMOVW, a1: C_LEXT, a6: C_REG, type_: 36, size: 8},
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{as: AMOVWZ, a1: C_LEXT, a6: C_REG, type_: 36, size: 8},
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{as: AMOVBZ, a1: C_LEXT, a6: C_REG, type_: 36, size: 8},
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{as: AMOVB, a1: C_LEXT, a6: C_REG, type_: 37, size: 12},
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{as: AMOVD, a1: C_LAUTO, a6: C_REG, type_: 36, size: 8},
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{as: AMOVW, a1: C_LAUTO, a6: C_REG, type_: 36, size: 8},
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{as: AMOVWZ, a1: C_LAUTO, a6: C_REG, type_: 36, size: 8},
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{as: AMOVBZ, a1: C_LAUTO, a6: C_REG, type_: 36, size: 8},
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{as: AMOVB, a1: C_LAUTO, a6: C_REG, type_: 37, size: 12},
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{as: AMOVD, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
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{as: AMOVW, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
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{as: AMOVWZ, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
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{as: AMOVBZ, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
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{as: AMOVB, a1: C_LOREG, a6: C_REG, type_: 37, size: 12},
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{as: AMOVD, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
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{as: AMOVW, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
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{as: AMOVWZ, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
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{as: AMOVBZ, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
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{as: AMOVB, a1: C_ADDR, a6: C_REG, type_: 76, size: 12},
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{as: AMOVD, a1: C_TLS_LE, a6: C_REG, type_: 79, size: 4},
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{as: AMOVD, a1: C_TLS_IE, a6: C_REG, type_: 80, size: 8},
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{as: AMOVD, a1: C_GOTADDR, a6: C_REG, type_: 81, size: 8},
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{as: AMOVD, a1: C_TOCADDR, a6: C_REG, type_: 95, size: 8},
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/* load constant */
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{as: AMOVD, a1: C_SECON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVD, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVD, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
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{as: AMOVD, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
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{as: AMOVD, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVD, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVW, a1: C_SECON, a6: C_REG, type_: 3, size: 4}, /* TO DO: check */
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{as: AMOVW, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVW, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
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{as: AMOVW, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
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{as: AMOVW, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVW, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVWZ, a1: C_SECON, a6: C_REG, type_: 3, size: 4}, /* TO DO: check */
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{as: AMOVWZ, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVWZ, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
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{as: AMOVWZ, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
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{as: AMOVWZ, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVWZ, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
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/* load unsigned/long constants (TO DO: check) */
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{as: AMOVD, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVD, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
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{as: AMOVW, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVW, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
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{as: AMOVWZ, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
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{as: AMOVWZ, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
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{as: AMOVHBR, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 45, size: 4},
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{as: AMOVHBR, a1: C_ZOREG, a6: C_REG, type_: 45, size: 4},
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{as: AMOVHBR, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 44, size: 4},
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{as: AMOVHBR, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 44, size: 4},
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{as: AMOVHBR, a1: C_REG, a6: C_ZOREG, type_: 44, size: 4},
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{as: AMOVHBR, a1: C_REG, a6: C_ZOREG, type_: 44, size: 4},
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{as: AMOVHBR, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 45, size: 4},
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{as: AMOVHBR, a1: C_ZOREG, a6: C_REG, type_: 45, size: 4},
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{as: AMOVB, a1: C_ADDR, a6: C_REG, type_: 76, size: 12},
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{as: AMOVB, a1: C_LAUTO, a6: C_REG, type_: 37, size: 12},
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{as: AMOVB, a1: C_LEXT, a6: C_REG, type_: 37, size: 12},
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{as: AMOVB, a1: C_LOREG, a6: C_REG, type_: 37, size: 12},
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{as: AMOVB, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
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{as: AMOVB, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
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{as: AMOVB, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
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{as: AMOVB, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
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{as: AMOVB, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
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{as: AMOVB, a1: C_REG, a6: C_REG, type_: 12, size: 4},
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{as: AMOVB, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
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{as: AMOVB, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
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{as: AMOVB, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
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||||||
|
{as: AMOVB, a1: C_SAUTO, a6: C_REG, type_: 9, size: 8},
|
||||||
|
{as: AMOVB, a1: C_SEXT, a6: C_REG, type_: 9, size: 8},
|
||||||
|
{as: AMOVB, a1: C_SOREG, a6: C_REG, type_: 9, size: 8},
|
||||||
|
{as: AMOVB, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 9, size: 8},
|
||||||
|
|
||||||
|
{as: AMOVBZ, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
|
||||||
|
{as: AMOVBZ, a1: C_LAUTO, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVBZ, a1: C_LEXT, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVBZ, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a6: C_REG, type_: 13, size: 4},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
|
||||||
|
{as: AMOVBZ, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
|
||||||
|
{as: AMOVBZ, a1: C_SAUTO, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVBZ, a1: C_SEXT, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVBZ, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVBZ, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
|
||||||
|
|
||||||
|
{as: AMOVD, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVD, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
|
||||||
|
{as: AMOVD, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVD, a1: C_CTR, a6: C_REG, type_: 66, size: 4},
|
||||||
|
{as: AMOVD, a1: C_GOTADDR, a6: C_REG, type_: 81, size: 8},
|
||||||
|
{as: AMOVD, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
|
||||||
|
{as: AMOVD, a1: C_LAUTO, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVD, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
|
||||||
|
{as: AMOVD, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
|
||||||
|
{as: AMOVD, a1: C_LEXT, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVD, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVD, a1: C_LR, a6: C_REG, type_: 66, size: 4},
|
||||||
|
{as: AMOVD, a1: C_MSR, a6: C_REG, type_: 54, size: 4}, /* mfmsr */
|
||||||
|
{as: AMOVD, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_CTR, type_: 66, size: 4},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_LR, type_: 66, size: 4},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_MSR, type_: 54, size: 4}, /* mtmsrd */
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_REG, type_: 1, size: 4},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
|
||||||
|
{as: AMOVD, a1: C_REG, a6: C_XER, type_: 66, size: 4},
|
||||||
|
{as: AMOVD, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVD, a1: C_SAUTO, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVD, a1: C_SECON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVD, a1: C_SEXT, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVD, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVD, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
|
||||||
|
{as: AMOVD, a1: C_TLS_IE, a6: C_REG, type_: 80, size: 8},
|
||||||
|
{as: AMOVD, a1: C_TLS_LE, a6: C_REG, type_: 79, size: 4},
|
||||||
|
{as: AMOVD, a1: C_TOCADDR, a6: C_REG, type_: 95, size: 8},
|
||||||
|
{as: AMOVD, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVD, a1: C_XER, a6: C_REG, type_: 66, size: 4},
|
||||||
|
{as: AMOVD, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
|
||||||
|
|
||||||
|
{as: AMOVW, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVW, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
|
||||||
|
{as: AMOVW, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVW, a1: C_CREG, a6: C_REG, type_: 68, size: 4},
|
||||||
|
{as: AMOVW, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
|
||||||
|
{as: AMOVW, a1: C_LAUTO, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVW, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
|
||||||
|
{as: AMOVW, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
|
||||||
|
{as: AMOVW, a1: C_LEXT, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVW, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVW, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_CREG, type_: 69, size: 4},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_CTR, type_: 66, size: 4},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_REG, type_: 12, size: 4},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
|
||||||
|
{as: AMOVW, a1: C_REG, a6: C_XER, type_: 66, size: 4},
|
||||||
|
{as: AMOVW, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVW, a1: C_SAUTO, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVW, a1: C_SECON, a6: C_REG, type_: 3, size: 4}, /* TO DO: check */
|
||||||
|
{as: AMOVW, a1: C_SEXT, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVW, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVW, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
|
||||||
|
{as: AMOVW, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVW, a1: C_XER, a6: C_REG, type_: 66, size: 4},
|
||||||
|
{as: AMOVW, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
|
||||||
|
|
||||||
|
{as: AMOVWZ, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_CREG, a6: C_REG, type_: 68, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_LAUTO, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_LEXT, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a2: C_REG, a6: C_ZOREG, type_: 7, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_CREG, type_: 69, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_CTR, type_: 66, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_LAUTO, type_: 35, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_LEXT, type_: 35, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_MSR, type_: 54, size: 4}, /* mtmsr */
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_REG, type_: 13, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_SAUTO, type_: 7, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_SEXT, type_: 7, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_REG, a6: C_XER, type_: 66, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_SAUTO, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_SECON, a6: C_REG, type_: 3, size: 4}, /* TO DO: check */
|
||||||
|
{as: AMOVWZ, a1: C_SEXT, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_XER, a6: C_REG, type_: 66, size: 4},
|
||||||
|
{as: AMOVWZ, a1: C_ZOREG, a2: C_REG, a6: C_REG, type_: 8, size: 4},
|
||||||
|
|
||||||
|
{as: AMOVFL, a1: C_CREG, a6: C_CREG, type_: 67, size: 4},
|
||||||
|
{as: AMOVFL, a1: C_FPSCR, a6: C_CREG, type_: 73, size: 4},
|
||||||
|
{as: AMOVFL, a1: C_FPSCR, a6: C_FREG, type_: 53, size: 4},
|
||||||
|
{as: AMOVFL, a1: C_FREG, a3: C_LCON, a6: C_FPSCR, type_: 64, size: 4},
|
||||||
|
{as: AMOVFL, a1: C_FREG, a6: C_FPSCR, type_: 64, size: 4},
|
||||||
|
{as: AMOVFL, a1: C_LCON, a6: C_FPSCR, type_: 65, size: 4},
|
||||||
|
{as: AMOVFL, a1: C_REG, a6: C_CREG, type_: 69, size: 4},
|
||||||
|
{as: AMOVFL, a1: C_REG, a6: C_LCON, type_: 69, size: 4},
|
||||||
|
|
||||||
{as: ASYSCALL, type_: 5, size: 4},
|
{as: ASYSCALL, type_: 5, size: 4},
|
||||||
{as: ASYSCALL, a1: C_REG, type_: 77, size: 12},
|
{as: ASYSCALL, a1: C_REG, type_: 77, size: 12},
|
||||||
{as: ASYSCALL, a1: C_SCON, type_: 77, size: 12},
|
{as: ASYSCALL, a1: C_SCON, type_: 77, size: 12},
|
||||||
@ -352,6 +380,7 @@ var optab = []Optab{
|
|||||||
{as: ABC, a1: C_SCON, a2: C_REG, a6: C_LR, type_: 18, size: 4},
|
{as: ABC, a1: C_SCON, a2: C_REG, a6: C_LR, type_: 18, size: 4},
|
||||||
{as: ABC, a1: C_SCON, a2: C_REG, a6: C_CTR, type_: 18, size: 4},
|
{as: ABC, a1: C_SCON, a2: C_REG, a6: C_CTR, type_: 18, size: 4},
|
||||||
{as: ABC, a6: C_ZOREG, type_: 15, size: 8},
|
{as: ABC, a6: C_ZOREG, type_: 15, size: 8},
|
||||||
|
{as: AFMOVD, a1: C_FREG, a6: C_FREG, type_: 33, size: 4},
|
||||||
{as: AFMOVD, a1: C_SEXT, a6: C_FREG, type_: 8, size: 4},
|
{as: AFMOVD, a1: C_SEXT, a6: C_FREG, type_: 8, size: 4},
|
||||||
{as: AFMOVD, a1: C_SAUTO, a6: C_FREG, type_: 8, size: 4},
|
{as: AFMOVD, a1: C_SAUTO, a6: C_FREG, type_: 8, size: 4},
|
||||||
{as: AFMOVD, a1: C_SOREG, a6: C_FREG, type_: 8, size: 4},
|
{as: AFMOVD, a1: C_SOREG, a6: C_FREG, type_: 8, size: 4},
|
||||||
@ -392,14 +421,6 @@ var optab = []Optab{
|
|||||||
{as: AREMD, a1: C_REG, a6: C_REG, type_: 51, size: 12},
|
{as: AREMD, a1: C_REG, a6: C_REG, type_: 51, size: 12},
|
||||||
{as: AREMD, a1: C_REG, a2: C_REG, a6: C_REG, type_: 51, size: 12},
|
{as: AREMD, a1: C_REG, a2: C_REG, a6: C_REG, type_: 51, size: 12},
|
||||||
{as: AMTFSB0, a1: C_SCON, type_: 52, size: 4},
|
{as: AMTFSB0, a1: C_SCON, type_: 52, size: 4},
|
||||||
{as: AMOVFL, a1: C_FPSCR, a6: C_FREG, type_: 53, size: 4},
|
|
||||||
{as: AMOVFL, a1: C_FREG, a6: C_FPSCR, type_: 64, size: 4},
|
|
||||||
{as: AMOVFL, a1: C_FREG, a3: C_LCON, a6: C_FPSCR, type_: 64, size: 4},
|
|
||||||
{as: AMOVFL, a1: C_LCON, a6: C_FPSCR, type_: 65, size: 4},
|
|
||||||
{as: AMOVD, a1: C_MSR, a6: C_REG, type_: 54, size: 4}, /* mfmsr */
|
|
||||||
{as: AMOVD, a1: C_REG, a6: C_MSR, type_: 54, size: 4}, /* mtmsrd */
|
|
||||||
{as: AMOVWZ, a1: C_REG, a6: C_MSR, type_: 54, size: 4}, /* mtmsr */
|
|
||||||
|
|
||||||
/* Other ISA 2.05+ instructions */
|
/* Other ISA 2.05+ instructions */
|
||||||
{as: APOPCNTD, a1: C_REG, a6: C_REG, type_: 93, size: 4}, /* population count, x-form */
|
{as: APOPCNTD, a1: C_REG, a6: C_REG, type_: 93, size: 4}, /* population count, x-form */
|
||||||
{as: ACMPB, a1: C_REG, a2: C_REG, a6: C_REG, type_: 92, size: 4}, /* compare byte, x-form */
|
{as: ACMPB, a1: C_REG, a2: C_REG, a6: C_REG, type_: 92, size: 4}, /* compare byte, x-form */
|
||||||
@ -562,35 +583,6 @@ var optab = []Optab{
|
|||||||
/* VSX vector integer-FP conversion */
|
/* VSX vector integer-FP conversion */
|
||||||
{as: AXVCVSXDDP, a1: C_VSREG, a6: C_VSREG, type_: 89, size: 4}, /* vsx vector integer-fp conversion, xx2-form */
|
{as: AXVCVSXDDP, a1: C_VSREG, a6: C_VSREG, type_: 89, size: 4}, /* vsx vector integer-fp conversion, xx2-form */
|
||||||
|
|
||||||
/* 64-bit special registers */
|
|
||||||
{as: AMOVD, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
|
|
||||||
{as: AMOVD, a1: C_REG, a6: C_LR, type_: 66, size: 4},
|
|
||||||
{as: AMOVD, a1: C_REG, a6: C_CTR, type_: 66, size: 4},
|
|
||||||
{as: AMOVD, a1: C_REG, a6: C_XER, type_: 66, size: 4},
|
|
||||||
{as: AMOVD, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
|
|
||||||
{as: AMOVD, a1: C_LR, a6: C_REG, type_: 66, size: 4},
|
|
||||||
{as: AMOVD, a1: C_CTR, a6: C_REG, type_: 66, size: 4},
|
|
||||||
{as: AMOVD, a1: C_XER, a6: C_REG, type_: 66, size: 4},
|
|
||||||
|
|
||||||
/* 32-bit special registers (gloss over sign-extension or not?) */
|
|
||||||
{as: AMOVW, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
|
|
||||||
{as: AMOVW, a1: C_REG, a6: C_CTR, type_: 66, size: 4},
|
|
||||||
{as: AMOVW, a1: C_REG, a6: C_XER, type_: 66, size: 4},
|
|
||||||
{as: AMOVW, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
|
|
||||||
{as: AMOVW, a1: C_XER, a6: C_REG, type_: 66, size: 4},
|
|
||||||
{as: AMOVWZ, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
|
|
||||||
{as: AMOVWZ, a1: C_REG, a6: C_CTR, type_: 66, size: 4},
|
|
||||||
{as: AMOVWZ, a1: C_REG, a6: C_XER, type_: 66, size: 4},
|
|
||||||
{as: AMOVWZ, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
|
|
||||||
{as: AMOVWZ, a1: C_XER, a6: C_REG, type_: 66, size: 4},
|
|
||||||
{as: AMOVFL, a1: C_FPSCR, a6: C_CREG, type_: 73, size: 4},
|
|
||||||
{as: AMOVFL, a1: C_CREG, a6: C_CREG, type_: 67, size: 4},
|
|
||||||
{as: AMOVW, a1: C_CREG, a6: C_REG, type_: 68, size: 4},
|
|
||||||
{as: AMOVWZ, a1: C_CREG, a6: C_REG, type_: 68, size: 4},
|
|
||||||
{as: AMOVFL, a1: C_REG, a6: C_LCON, type_: 69, size: 4},
|
|
||||||
{as: AMOVFL, a1: C_REG, a6: C_CREG, type_: 69, size: 4},
|
|
||||||
{as: AMOVW, a1: C_REG, a6: C_CREG, type_: 69, size: 4},
|
|
||||||
{as: AMOVWZ, a1: C_REG, a6: C_CREG, type_: 69, size: 4},
|
|
||||||
{as: ACMP, a1: C_REG, a6: C_REG, type_: 70, size: 4},
|
{as: ACMP, a1: C_REG, a6: C_REG, type_: 70, size: 4},
|
||||||
{as: ACMP, a1: C_REG, a2: C_REG, a6: C_REG, type_: 70, size: 4},
|
{as: ACMP, a1: C_REG, a2: C_REG, a6: C_REG, type_: 70, size: 4},
|
||||||
{as: ACMP, a1: C_REG, a6: C_ADDCON, type_: 71, size: 4},
|
{as: ACMP, a1: C_REG, a6: C_ADDCON, type_: 71, size: 4},
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user