qbit/go
1
0
Fork 0
mirror of https://github.com/golang/go synced 2024-11-19 07:54:43 -07:00
Code Releases Activity

cmd/compile: constant fold ANDs.

Browse Source 
ANDQConst show up occassionally because of right shifting lowering.
ORs and XORs are already folded properly during generic.

Change-Id: I2f9134679555029c641264ce5333d70e167c65f7
Reviewed-on: https://go-review.googlesource.com/21375
Reviewed-by: Keith Randall <khr@golang.org>
Run-TryBot: Alexandru Moșoi <alexandru@mosoi.ro>
TryBot-Result: Gobot Gobot <gobot@golang.org>
This commit is contained in:
Alexandru Moșoi 2016-04-01 00:54:13 +02:00 committed by Alexandru Moșoi
parent ec5083e49b
commit 7a4211bc1f
2 changed files with 69 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/cmd/compile/internal/ssa/gen/AMD64.rules
View File

@ -475,6 +475,11 @@
(ANDB x (MOVBconst [c])) -> (ANDBconst [c] x) (ANDB x (MOVBconst [c])) -> (ANDBconst [c] x)
(ANDB (MOVBconst [c]) x) -> (ANDBconst [c] x) (ANDB (MOVBconst [c]) x) -> (ANDBconst [c] x)
(ANDBconst [c] (ANDBconst [d] x)) -> (ANDBconst [c & d] x)
(ANDWconst [c] (ANDWconst [d] x)) -> (ANDWconst [c & d] x)
(ANDLconst [c] (ANDLconst [d] x)) -> (ANDLconst [c & d] x)
(ANDQconst [c] (ANDQconst [d] x)) -> (ANDQconst [c & d] x)
(ORQ x (MOVQconst [c])) && is32Bit(c) -> (ORQconst [c] x) (ORQ x (MOVQconst [c])) && is32Bit(c) -> (ORQconst [c] x)
(ORQ (MOVQconst [c]) x) && is32Bit(c) -> (ORQconst [c] x) (ORQ (MOVQconst [c]) x) && is32Bit(c) -> (ORQconst [c] x)
(ORL x (MOVLconst [c])) -> (ORLconst [c] x) (ORL x (MOVLconst [c])) -> (ORLconst [c] x)

64
src/cmd/compile/internal/ssa/rewriteAMD64.go
View File

@ -1598,6 +1598,22 @@ func rewriteValueAMD64_OpAMD64ANDB(v *Value, config *Config) bool {
func rewriteValueAMD64_OpAMD64ANDBconst(v *Value, config *Config) bool { func rewriteValueAMD64_OpAMD64ANDBconst(v *Value, config *Config) bool {
b := v.Block b := v.Block
_ = b _ = b
// match: (ANDBconst [c] (ANDBconst [d] x))
// cond:
// result: (ANDBconst [c & d] x)
for {
c := v.AuxInt
v_0 := v.Args[0]
if v_0.Op != OpAMD64ANDBconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
v.reset(OpAMD64ANDBconst)
v.AuxInt = c & d
v.AddArg(x)
return true
}
// match: (ANDBconst [c] _) // match: (ANDBconst [c] _)
// cond: int8(c)==0 // cond: int8(c)==0
// result: (MOVBconst [0]) // result: (MOVBconst [0])
@ -1691,6 +1707,22 @@ func rewriteValueAMD64_OpAMD64ANDL(v *Value, config *Config) bool {
func rewriteValueAMD64_OpAMD64ANDLconst(v *Value, config *Config) bool { func rewriteValueAMD64_OpAMD64ANDLconst(v *Value, config *Config) bool {
b := v.Block b := v.Block
_ = b _ = b
// match: (ANDLconst [c] (ANDLconst [d] x))
// cond:
// result: (ANDLconst [c & d] x)
for {
c := v.AuxInt
v_0 := v.Args[0]
if v_0.Op != OpAMD64ANDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
v.reset(OpAMD64ANDLconst)
v.AuxInt = c & d
v.AddArg(x)
return true
}
// match: (ANDLconst [c] _) // match: (ANDLconst [c] _)
// cond: int32(c)==0 // cond: int32(c)==0
// result: (MOVLconst [0]) // result: (MOVLconst [0])
@ -1790,6 +1822,22 @@ func rewriteValueAMD64_OpAMD64ANDQ(v *Value, config *Config) bool {
func rewriteValueAMD64_OpAMD64ANDQconst(v *Value, config *Config) bool { func rewriteValueAMD64_OpAMD64ANDQconst(v *Value, config *Config) bool {
b := v.Block b := v.Block
_ = b _ = b
// match: (ANDQconst [c] (ANDQconst [d] x))
// cond:
// result: (ANDQconst [c & d] x)
for {
c := v.AuxInt
v_0 := v.Args[0]
if v_0.Op != OpAMD64ANDQconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
v.reset(OpAMD64ANDQconst)
v.AuxInt = c & d
v.AddArg(x)
return true
}
// match: (ANDQconst [0] _) // match: (ANDQconst [0] _)
// cond: // cond:
// result: (MOVQconst [0]) // result: (MOVQconst [0])
@ -1911,6 +1959,22 @@ func rewriteValueAMD64_OpAMD64ANDW(v *Value, config *Config) bool {
func rewriteValueAMD64_OpAMD64ANDWconst(v *Value, config *Config) bool { func rewriteValueAMD64_OpAMD64ANDWconst(v *Value, config *Config) bool {
b := v.Block b := v.Block
_ = b _ = b
// match: (ANDWconst [c] (ANDWconst [d] x))
// cond:
// result: (ANDWconst [c & d] x)
for {
c := v.AuxInt
v_0 := v.Args[0]
if v_0.Op != OpAMD64ANDWconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
v.reset(OpAMD64ANDWconst)
v.AuxInt = c & d
v.AddArg(x)
return true
}
// match: (ANDWconst [c] _) // match: (ANDWconst [c] _)
// cond: int16(c)==0 // cond: int16(c)==0
// result: (MOVWconst [0]) // result: (MOVWconst [0])