mirror of
https://github.com/golang/go
synced 2024-11-19 14:54:43 -07:00
8a: delete dreg l.s
R=golang-dev, adg CC=golang-dev https://golang.org/cl/4631053
This commit is contained in:
parent
d119e3bc0f
commit
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734
src/cmd/8a/l.s
734
src/cmd/8a/l.s
@ -1,734 +0,0 @@
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// Inferno utils/8a/l.s
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// http://code.google.com/p/inferno-os/source/browse/utils/8a/l.s
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//
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// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
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// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
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// Portions Copyright © 1997-1999 Vita Nuova Limited
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// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
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// Portions Copyright © 2004,2006 Bruce Ellis
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// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
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// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
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// Portions Copyright © 2009 The Go Authors. All rights reserved.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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/*
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* Memory and machine-specific definitions. Used in C and assembler.
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*/
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/*
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* Sizes
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*/
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#define BI2BY 8 /* bits per byte */
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#define BI2WD 32 /* bits per word */
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#define BY2WD 4 /* bytes per word */
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#define BY2PG 4096 /* bytes per page */
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#define WD2PG (BY2PG/BY2WD) /* words per page */
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#define PGSHIFT 12 /* log(BY2PG) */
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#define PGROUND(s) (((s)+(BY2PG-1))&~(BY2PG-1))
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#define MAXMACH 1 /* max # cpus system can run */
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/*
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* Time
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*/
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#define HZ (20) /* clock frequency */
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#define MS2HZ (1000/HZ) /* millisec per clock tick */
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#define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
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#define TK2MS(t) ((((ulong)(t))*1000)/HZ) /* ticks to milliseconds */
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#define MS2TK(t) ((((ulong)(t))*HZ)/1000) /* milliseconds to ticks */
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/*
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* Fundamental addresses
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*/
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/*
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* Address spaces
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*
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* User is at 0-2GB
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* Kernel is at 2GB-4GB
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*
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* To avoid an extra page map, both the user stack (USTKTOP) and
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* the temporary user stack (TSTKTOP) should be in the the same
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* 4 meg.
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*/
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#define UZERO 0 /* base of user address space */
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#define UTZERO (UZERO+BY2PG) /* first address in user text */
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#define KZERO 0x80000000 /* base of kernel address space */
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#define KTZERO KZERO /* first address in kernel text */
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#define USERADDR 0xC0000000 /* struct User */
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#define UREGADDR (USERADDR+BY2PG-4*19)
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#define TSTKTOP USERADDR /* end of new stack in sysexec */
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#define TSTKSIZ 10
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#define USTKTOP (TSTKTOP-TSTKSIZ*BY2PG) /* byte just beyond user stack */
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#define USTKSIZE (16*1024*1024 - TSTKSIZ*BY2PG) /* size of user stack */
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#define ROMBIOS (KZERO|0xF0000)
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#define MACHSIZE 4096
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#define isphys(x) (((ulong)x)&KZERO)
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/*
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* known 80386 segments (in GDT) and their selectors
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*/
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#define NULLSEG 0 /* null segment */
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#define KDSEG 1 /* kernel data/stack */
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#define KESEG 2 /* kernel executable */
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#define UDSEG 3 /* user data/stack */
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#define UESEG 4 /* user executable */
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#define TSSSEG 5 /* task segment */
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#define SELGDT (0<<3) /* selector is in gdt */
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#define SELLDT (1<<3) /* selector is in ldt */
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#define SELECTOR(i, t, p) (((i)<<3) | (t) | (p))
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#define NULLSEL SELECTOR(NULLSEG, SELGDT, 0)
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#define KESEL SELECTOR(KESEG, SELGDT, 0)
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#define KDSEL SELECTOR(KDSEG, SELGDT, 0)
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#define UESEL SELECTOR(UESEG, SELGDT, 3)
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#define UDSEL SELECTOR(UDSEG, SELGDT, 3)
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#define TSSSEL SELECTOR(TSSSEG, SELGDT, 0)
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/*
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* fields in segment descriptors
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*/
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#define SEGDATA (0x10<<8) /* data/stack segment */
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#define SEGEXEC (0x18<<8) /* executable segment */
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#define SEGTSS (0x9<<8) /* TSS segment */
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#define SEGCG (0x0C<<8) /* call gate */
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#define SEGIG (0x0E<<8) /* interrupt gate */
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#define SEGTG (0x0F<<8) /* task gate */
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#define SEGTYPE (0x1F<<8)
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#define SEGP (1<<15) /* segment present */
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#define SEGPL(x) ((x)<<13) /* priority level */
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#define SEGB (1<<22) /* granularity 1==4k (for expand-down) */
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#define SEGG (1<<23) /* granularity 1==4k (for other) */
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#define SEGE (1<<10) /* expand down */
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#define SEGW (1<<9) /* writable (for data/stack) */
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#define SEGR (1<<9) /* readable (for code) */
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#define SEGD (1<<22) /* default 1==32bit (for code) */
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/*
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* virtual MMU
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*/
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#define PTEMAPMEM (1024*1024) /* ??? */
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#define SEGMAPSIZE 16 /* ??? */
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#define PTEPERTAB (PTEMAPMEM/BY2PG) /* ??? */
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#define PPN(x) ((x)&~(BY2PG-1))
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/*
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* physical MMU
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*/
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#define PTEVALID (1<<0)
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#define PTEUNCACHED 0 /* everything is uncached */
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#define PTEWRITE (1<<1)
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#define PTERONLY (0<<1)
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#define PTEKERNEL (0<<2)
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#define PTEUSER (1<<2)
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/*
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* flag register bits that we care about
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*/
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#define IFLAG 0x200
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#define OP16 BYTE $0x66
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/*
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* about to walk all over ms/dos - turn off interrupts
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*/
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TEXT origin(SB),$0
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CLI
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#ifdef BOOT
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/*
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* This part of l.s is used only in the boot kernel.
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* It assumes that we are in real address mode, i.e.,
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* that we look like an 8086.
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*/
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/*
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* relocate everything to a half meg and jump there
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* - looks wierd because it is being assembled by a 32 bit
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* assembler for a 16 bit world
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*/
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MOVL $0,BX
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INCL BX
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SHLL $15,BX
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MOVL BX,CX
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MOVW BX,ES
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MOVL $0,SI
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MOVL SI,DI
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CLD; REP; MOVSL
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/* JMPFAR 0X8000:$lowcore(SB) /**/
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BYTE $0xEA
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WORD $lowcore(SB)
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WORD $0X8000
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TEXT lowcore(SB),$0
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/*
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* now that we're in low core, update the DS
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*/
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MOVW BX,DS
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/*
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* goto protected mode
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*/
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/* MOVL tgdtptr(SB),GDTR /**/
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BYTE $0x0f
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BYTE $0x01
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BYTE $0x16
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WORD $tgdtptr(SB)
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MOVL CR0,AX
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ORL $1,AX
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MOVL AX,CR0
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/*
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* clear prefetch queue (wierd code to avoid optimizations)
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*/
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CLC
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JCC flush
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MOVL AX,AX
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flush:
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/*
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* set all segs
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*/
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/* MOVW $SELECTOR(1, SELGDT, 0),AX /**/
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BYTE $0xc7
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BYTE $0xc0
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WORD $SELECTOR(1, SELGDT, 0)
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MOVW AX,DS
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MOVW AX,SS
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MOVW AX,ES
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MOVW AX,FS
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MOVW AX,GS
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/* JMPFAR SELECTOR(2, SELGDT, 0):$mode32bit(SB) /**/
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BYTE $0x66
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BYTE $0xEA
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LONG $mode32bit-KZERO(SB)
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WORD $SELECTOR(2, SELGDT, 0)
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TEXT mode32bit(SB),$0
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#endif BOOT
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/*
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* Clear BSS
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*/
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LEAL edata-KZERO(SB),SI
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MOVL SI,DI
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ADDL $4,DI
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MOVL $0,AX
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MOVL AX,(SI)
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LEAL end-KZERO(SB),CX
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SUBL DI,CX
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SHRL $2,CX
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CLD; REP; MOVSL
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/*
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* make a bottom level page table page that maps the first
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* 16 meg of physical memory
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*/
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LEAL tpt-KZERO(SB),AX /* get phys addr of temporary page table */
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ADDL $(BY2PG-1),AX /* must be page aligned */
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ANDL $(~(BY2PG-1)),AX /* ... */
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MOVL $(4*1024),CX /* pte's per page */
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MOVL $((((4*1024)-1)<<PGSHIFT)|PTEVALID|PTEKERNEL|PTEWRITE),BX
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setpte:
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MOVL BX,-4(AX)(CX*4)
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SUBL $(1<<PGSHIFT),BX
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LOOP setpte
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/*
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* make a top level page table page that maps the first
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* 16 meg of memory to 0 thru 16meg and to KZERO thru KZERO+16meg
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*/
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MOVL AX,BX
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ADDL $(4*BY2PG),AX
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ADDL $(PTEVALID|PTEKERNEL|PTEWRITE),BX
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MOVL BX,0(AX)
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MOVL BX,((((KZERO>>1)&0x7FFFFFFF)>>(2*PGSHIFT-1-4))+0)(AX)
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ADDL $BY2PG,BX
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MOVL BX,4(AX)
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MOVL BX,((((KZERO>>1)&0x7FFFFFFF)>>(2*PGSHIFT-1-4))+4)(AX)
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ADDL $BY2PG,BX
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MOVL BX,8(AX)
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MOVL BX,((((KZERO>>1)&0x7FFFFFFF)>>(2*PGSHIFT-1-4))+8)(AX)
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ADDL $BY2PG,BX
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MOVL BX,12(AX)
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MOVL BX,((((KZERO>>1)&0x7FFFFFFF)>>(2*PGSHIFT-1-4))+12)(AX)
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/*
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* point processor to top level page & turn on paging
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*/
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MOVL AX,CR3
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MOVL CR0,AX
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ORL $0X80000000,AX
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ANDL $~(0x8|0x2),AX /* TS=0, MP=0 */
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MOVL AX,CR0
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/*
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* use a jump to an absolute location to get the PC into
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* KZERO.
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*/
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LEAL tokzero(SB),AX
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JMP* AX
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TEXT tokzero(SB),$0
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/*
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* stack and mach
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*/
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MOVL $mach0(SB),SP
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MOVL SP,m(SB)
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MOVL $0,0(SP)
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ADDL $(MACHSIZE-4),SP /* start stack under machine struct */
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MOVL $0, u(SB)
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/*
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* clear flags
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*/
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MOVL $0,AX
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PUSHL AX
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POPFL
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CALL main(SB)
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loop:
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JMP loop
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GLOBL mach0+0(SB), $MACHSIZE
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GLOBL u(SB), $4
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GLOBL m(SB), $4
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GLOBL tpt(SB), $(BY2PG*6)
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/*
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* gdt to get us to 32-bit/segmented/unpaged mode
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*/
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TEXT tgdt(SB),$0
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/* null descriptor */
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LONG $0
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LONG $0
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/* data segment descriptor for 4 gigabytes (PL 0) */
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LONG $(0xFFFF)
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LONG $(SEGG|SEGB|(0xF<<16)|SEGP|SEGPL(0)|SEGDATA|SEGW)
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/* exec segment descriptor for 4 gigabytes (PL 0) */
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LONG $(0xFFFF)
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LONG $(SEGG|SEGD|(0xF<<16)|SEGP|SEGPL(0)|SEGEXEC|SEGR)
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/*
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* pointer to initial gdt
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*/
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TEXT tgdtptr(SB),$0
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WORD $(3*8)
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LONG $tgdt-KZERO(SB)
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/*
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* input a byte
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*/
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TEXT inb(SB),$0
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MOVL p+0(FP),DX
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XORL AX,AX
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INB
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RET
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/*
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* output a byte
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*/
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TEXT outb(SB),$0
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MOVL p+0(FP),DX
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MOVL b+4(FP),AX
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OUTB
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RET
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/*
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* input a string of shorts from a port
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*/
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TEXT inss(SB),$0
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MOVL p+0(FP),DX
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MOVL a+4(FP),DI
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MOVL c+8(FP),CX
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CLD; REP; OP16; INSL
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RET
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|
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/*
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* output a string of shorts to a port
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*/
|
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TEXT outss(SB),$0
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MOVL p+0(FP),DX
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MOVL a+4(FP),SI
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MOVL c+8(FP),CX
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CLD; REP; OP16; OUTSL
|
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RET
|
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|
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/*
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* test and set
|
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*/
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TEXT tas(SB),$0
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MOVL $0xdeadead,AX
|
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MOVL l+0(FP),BX
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XCHGL AX,(BX)
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RET
|
||||
|
||||
/*
|
||||
* routines to load/read various system registers
|
||||
*/
|
||||
GLOBL idtptr(SB),$6
|
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TEXT putidt(SB),$0 /* interrupt descriptor table */
|
||||
MOVL t+0(FP),AX
|
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MOVL AX,idtptr+2(SB)
|
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MOVL l+4(FP),AX
|
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MOVW AX,idtptr(SB)
|
||||
MOVL idtptr(SB),IDTR
|
||||
RET
|
||||
|
||||
GLOBL gdtptr(SB),$6
|
||||
TEXT putgdt(SB),$0 /* global descriptor table */
|
||||
MOVL t+0(FP),AX
|
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MOVL AX,gdtptr+2(SB)
|
||||
MOVL l+4(FP),AX
|
||||
MOVW AX,gdtptr(SB)
|
||||
MOVL gdtptr(SB),GDTR
|
||||
RET
|
||||
|
||||
TEXT putcr3(SB),$0 /* top level page table pointer */
|
||||
MOVL t+0(FP),AX
|
||||
MOVL AX,CR3
|
||||
RET
|
||||
|
||||
TEXT puttr(SB),$0 /* task register */
|
||||
MOVL t+0(FP),AX
|
||||
MOVW AX,TASK
|
||||
RET
|
||||
|
||||
TEXT getcr0(SB),$0 /* coprocessor bits */
|
||||
MOVL CR0,AX
|
||||
RET
|
||||
|
||||
TEXT getcr2(SB),$0 /* fault address */
|
||||
MOVL CR2,AX
|
||||
RET
|
||||
|
||||
#define FPOFF\
|
||||
WAIT;\
|
||||
MOVL CR0,AX;\
|
||||
ORL $0x4,AX /* EM=1 */;\
|
||||
MOVL AX,CR0
|
||||
|
||||
#define FPON\
|
||||
MOVL CR0,AX;\
|
||||
ANDL $~0x4,AX /* EM=0 */;\
|
||||
MOVL AX,CR0
|
||||
|
||||
TEXT fpoff(SB),$0 /* turn off floating point */
|
||||
FPOFF
|
||||
RET
|
||||
|
||||
TEXT fpinit(SB),$0 /* turn on & init the floating point */
|
||||
FPON
|
||||
FINIT
|
||||
WAIT
|
||||
PUSHW $0x0330
|
||||
FLDCW 0(SP) /* ignore underflow/precision, signal others */
|
||||
POPW AX
|
||||
WAIT
|
||||
RET
|
||||
|
||||
TEXT fpsave(SB),$0 /* save floating point state and turn off */
|
||||
MOVL p+0(FP),AX
|
||||
WAIT
|
||||
FSAVE 0(AX)
|
||||
FPOFF
|
||||
RET
|
||||
|
||||
TEXT fprestore(SB),$0 /* turn on floating point and restore regs */
|
||||
FPON
|
||||
MOVL p+0(FP),AX
|
||||
FRSTOR 0(AX)
|
||||
WAIT
|
||||
RET
|
||||
|
||||
TEXT fpstatus(SB),$0 /* get floating point status */
|
||||
FSTSW AX
|
||||
RET
|
||||
|
||||
/*
|
||||
* special traps
|
||||
*/
|
||||
TEXT intr0(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $0
|
||||
JMP intrcommon
|
||||
TEXT intr1(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $1
|
||||
JMP intrcommon
|
||||
TEXT intr2(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $2
|
||||
JMP intrcommon
|
||||
TEXT intr3(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $3
|
||||
JMP intrcommon
|
||||
TEXT intr4(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $4
|
||||
JMP intrcommon
|
||||
TEXT intr5(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $5
|
||||
JMP intrcommon
|
||||
TEXT intr6(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $6
|
||||
JMP intrcommon
|
||||
TEXT intr7(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $7
|
||||
JMP intrcommon
|
||||
TEXT intr8(SB),$0
|
||||
PUSHL $8
|
||||
JMP intrscommon
|
||||
TEXT intr9(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $9
|
||||
JMP intrcommon
|
||||
TEXT intr10(SB),$0
|
||||
PUSHL $10
|
||||
JMP intrscommon
|
||||
TEXT intr11(SB),$0
|
||||
PUSHL $11
|
||||
JMP intrscommon
|
||||
TEXT intr12(SB),$0
|
||||
PUSHL $12
|
||||
JMP intrscommon
|
||||
TEXT intr13(SB),$0
|
||||
PUSHL $13
|
||||
JMP intrscommon
|
||||
TEXT intr14(SB),$0
|
||||
PUSHL $14
|
||||
JMP intrscommon
|
||||
TEXT intr15(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $15
|
||||
JMP intrcommon
|
||||
TEXT intr16(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $16
|
||||
JMP intrcommon
|
||||
TEXT intr24(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $24
|
||||
JMP intrcommon
|
||||
TEXT intr25(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $25
|
||||
JMP intrcommon
|
||||
TEXT intr26(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $26
|
||||
JMP intrcommon
|
||||
TEXT intr27(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $27
|
||||
JMP intrcommon
|
||||
TEXT intr28(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $28
|
||||
JMP intrcommon
|
||||
TEXT intr29(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $29
|
||||
JMP intrcommon
|
||||
TEXT intr30(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $30
|
||||
JMP intrcommon
|
||||
TEXT intr31(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $31
|
||||
JMP intrcommon
|
||||
TEXT intr32(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $16
|
||||
JMP intrcommon
|
||||
TEXT intr33(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $33
|
||||
JMP intrcommon
|
||||
TEXT intr34(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $34
|
||||
JMP intrcommon
|
||||
TEXT intr35(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $35
|
||||
JMP intrcommon
|
||||
TEXT intr36(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $36
|
||||
JMP intrcommon
|
||||
TEXT intr37(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $37
|
||||
JMP intrcommon
|
||||
TEXT intr38(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $38
|
||||
JMP intrcommon
|
||||
TEXT intr39(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $39
|
||||
JMP intrcommon
|
||||
TEXT intr64(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $64
|
||||
JMP intrcommon
|
||||
TEXT intrbad(SB),$0
|
||||
PUSHL $0
|
||||
PUSHL $0x1ff
|
||||
JMP intrcommon
|
||||
|
||||
intrcommon:
|
||||
PUSHL DS
|
||||
PUSHL ES
|
||||
PUSHL FS
|
||||
PUSHL GS
|
||||
PUSHAL
|
||||
MOVL $(KDSEL),AX
|
||||
MOVW AX,DS
|
||||
MOVW AX,ES
|
||||
LEAL 0(SP),AX
|
||||
PUSHL AX
|
||||
CALL trap(SB)
|
||||
POPL AX
|
||||
POPAL
|
||||
POPL GS
|
||||
POPL FS
|
||||
POPL ES
|
||||
POPL DS
|
||||
ADDL $8,SP /* error code and trap type */
|
||||
IRETL
|
||||
|
||||
intrscommon:
|
||||
PUSHL DS
|
||||
PUSHL ES
|
||||
PUSHL FS
|
||||
PUSHL GS
|
||||
PUSHAL
|
||||
MOVL $(KDSEL),AX
|
||||
MOVW AX,DS
|
||||
MOVW AX,ES
|
||||
LEAL 0(SP),AX
|
||||
PUSHL AX
|
||||
CALL trap(SB)
|
||||
POPL AX
|
||||
POPAL
|
||||
POPL GS
|
||||
POPL FS
|
||||
POPL ES
|
||||
POPL DS
|
||||
ADDL $8,SP /* error code and trap type */
|
||||
IRETL
|
||||
|
||||
/*
|
||||
* interrupt level is interrupts on or off
|
||||
*/
|
||||
TEXT spllo(SB),$0
|
||||
PUSHFL
|
||||
POPL AX
|
||||
STI
|
||||
RET
|
||||
|
||||
TEXT splhi(SB),$0
|
||||
PUSHFL
|
||||
POPL AX
|
||||
CLI
|
||||
RET
|
||||
|
||||
TEXT splx(SB),$0
|
||||
MOVL s+0(FP),AX
|
||||
PUSHL AX
|
||||
POPFL
|
||||
RET
|
||||
|
||||
/*
|
||||
* do nothing whatsoever till interrupt happens
|
||||
*/
|
||||
TEXT idle(SB),$0
|
||||
HLT
|
||||
RET
|
||||
|
||||
/*
|
||||
* label consists of a stack pointer and a PC
|
||||
*/
|
||||
TEXT gotolabel(SB),$0
|
||||
MOVL l+0(FP),AX
|
||||
MOVL 0(AX),SP /* restore sp */
|
||||
MOVL 4(AX),AX /* put return pc on the stack */
|
||||
MOVL AX,0(SP)
|
||||
MOVL $1,AX /* return 1 */
|
||||
RET
|
||||
|
||||
TEXT setlabel(SB),$0
|
||||
MOVL l+0(FP),AX
|
||||
MOVL SP,0(AX) /* store sp */
|
||||
MOVL 0(SP),BX /* store return pc */
|
||||
MOVL BX,4(AX)
|
||||
MOVL $0,AX /* return 0 */
|
||||
RET
|
||||
|
||||
/*
|
||||
* Used to get to the first process.
|
||||
* Set up an interrupt return frame and IRET to user level.
|
||||
*/
|
||||
TEXT touser(SB),$0
|
||||
PUSHL $(UDSEL) /* old ss */
|
||||
PUSHL $(USTKTOP) /* old sp */
|
||||
PUSHFL /* old flags */
|
||||
PUSHL $(UESEL) /* old cs */
|
||||
PUSHL $(UTZERO+32) /* old pc */
|
||||
MOVL $(UDSEL),AX
|
||||
MOVW AX,DS
|
||||
MOVW AX,ES
|
||||
MOVW AX,GS
|
||||
MOVW AX,FS
|
||||
IRETL
|
||||
|
||||
/*
|
||||
* set configuration register
|
||||
*/
|
||||
TEXT config(SB),$0
|
||||
MOVL l+0(FP),AX
|
||||
MOVL $0x3F3,DX
|
||||
OUTB
|
||||
OUTB
|
||||
RET
|
Loading…
Reference in New Issue
Block a user