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cmd/asm: fix bug about VMOV instruction (move register to vector element) on ARM64

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This change fixes index error when encoding VMOV instruction which pattern is
VMOV Rn, V.<T>[index]. For example VMOV R1, V1.S[1] is assembled as VMOV R1, V1.S[0]

Fixes #24400
Change-Id: I82b5edc8af4e06862bc4692b119697c6bb7dc3fb
Reviewed-on: https://go-review.googlesource.com/101297
Reviewed-by: Cherry Zhang <cherryyz@google.com>
This commit is contained in:
Fangming.Fang 2018-03-19 06:52:28 +00:00 committed by Cherry Zhang
parent c12b185a6e
commit 7673e30503
2 changed files with 2 additions and 1 deletions
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1
src/cmd/asm/internal/asm/testdata/arm64.s vendored
View File

@ -230,6 +230,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
VMOV V0.D[0], R11 // 0b3c084e
VMOV V0.D[1], R11 // 0b3c184e
VMOV R20, V1.S[0] // 811e044e
VMOV R20, V1.S[1] // 811e0c4e
VMOV R1, V9.H4 // 290c020e
VMOV R22, V11.D2 // cb0e084e
VMOV V2.B16, V4.B16 // 441ca24e

2
src/cmd/internal/obj/arm64/asm7.go
View File

@ -3563,7 +3563,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
rt := int(p.To.Reg)
imm5 := 0
o1 = 1<<30 | 7<<25 | 7<<10
index := int(p.From.Index)
index := int(p.To.Index)
switch (p.To.Reg >> 5) & 15 {
case ARNG_B:
c.checkindex(p, index, 15)