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[dev.power64] 9g: implement regopt
This adds registerization support to 9g equivalent to what the other compilers have. LGTM=rsc R=rsc, dave CC=golang-codereviews https://golang.org/cl/174980043
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@ -70,24 +70,40 @@ struct Reg
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{
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Flow f;
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Bits set; // variables written by this instruction.
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Bits use1; // variables read by prog->from.
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Bits use2; // variables read by prog->to.
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Bits set; // regopt variables written by this instruction.
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Bits use1; // regopt variables read by prog->from.
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Bits use2; // regopt variables read by prog->to.
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// refahead/refbehind are the regopt variables whose current
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// value may be used in the following/preceding instructions
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// up to a CALL (or the value is clobbered).
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Bits refbehind;
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Bits refahead;
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// calahead/calbehind are similar, but for variables in
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// instructions that are reachable after hitting at least one
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// CALL.
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Bits calbehind;
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Bits calahead;
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Bits regdiff;
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Bits act;
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int32 regu; // register used bitmap
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uint64 regu; // register used bitmap
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};
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#define R ((Reg*)0)
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/*c2go extern Reg *R; */
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#define NRGN 600
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/*c2go enum { NRGN = 600 }; */
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// A Rgn represents a single regopt variable over a region of code
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// where a register could potentially be dedicated to that variable.
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// The code encompassed by a Rgn is defined by the flow graph,
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// starting at enter, flood-filling forward while varno is refahead
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// and backward while varno is refbehind, and following branches. A
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// single variable may be represented by multiple disjoint Rgns and
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// each Rgn may choose a different register for that variable.
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// Registers are allocated to regions greedily in order of descending
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// cost.
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struct Rgn
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{
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Reg* enter;
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@ -104,7 +120,7 @@ EXTERN Rgn* rgp;
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EXTERN int nregion;
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EXTERN int nvar;
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EXTERN int32 regbits;
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EXTERN int32 exregbits;
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EXTERN int32 exregbits; // TODO(austin) not used; remove
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EXTERN Bits externs;
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EXTERN Bits params;
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EXTERN Bits consts;
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@ -118,10 +134,8 @@ EXTERN struct
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{
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int32 ncvtreg;
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int32 nspill;
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int32 nreload;
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int32 ndelmov;
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int32 nvar;
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int32 naddr;
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} ostats;
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/*
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@ -133,10 +147,10 @@ void addmove(Reg*, int, int, int);
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Bits mkvar(Reg*, Adr*);
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void prop(Reg*, Bits, Bits);
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void synch(Reg*, Bits);
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uint32 allreg(uint32, Rgn*);
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uint64 allreg(uint64, Rgn*);
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void paint1(Reg*, int);
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uint32 paint2(Reg*, int);
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void paint3(Reg*, int, int32, int);
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uint64 paint2(Reg*, int, int);
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void paint3(Reg*, int, uint64, int);
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void addreg(Adr*, int);
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void dumpone(Flow*, int);
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void dumpit(char*, Flow*, int);
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@ -160,8 +174,8 @@ typedef struct ProgInfo ProgInfo;
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struct ProgInfo
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{
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uint32 flags; // the bits below
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uint64 reguse; // required registers used by this instruction
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uint64 regset; // required registers set by this instruction
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uint64 reguse; // registers implicitly used by this instruction
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uint64 regset; // registers implicitly set by this instruction
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uint64 regindex; // registers used by addressing mode
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};
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@ -182,20 +196,21 @@ enum
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SizeF = 1<<7, // float aka float32
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SizeD = 1<<8, // double aka float64
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// Left side: address taken, read, write.
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// Left side (Prog.from): address taken, read, write.
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LeftAddr = 1<<9,
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LeftRead = 1<<10,
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LeftWrite = 1<<11,
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// Register in middle; never written.
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// Register in middle (Prog.reg); only ever read.
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RegRead = 1<<12,
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CanRegRead = 1<<13,
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// Right side: address taken, read, write.
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// Right side (Prog.to): address taken, read, write.
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RightAddr = 1<<14,
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RightRead = 1<<15,
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RightWrite = 1<<16,
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// Instruction updates whichever of from/to is type D_OREG
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PostInc = 1<<17,
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// Instruction kinds
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1214
src/cmd/9g/reg.c
1214
src/cmd/9g/reg.c
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