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internal/cpu: align capability definitions for x86 with other architectures
Use constant masks and align the definition of isSet with arm64 and ppc64x. Change-Id: I0c6eae30da5e3ce797cde0dab4a39855d4d245d9 Reviewed-on: https://go-review.googlesource.com/94759 Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
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@ -14,6 +14,30 @@ func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32)
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// xgetbv with ecx = 0 is implemented in cpu_x86.s.
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// xgetbv with ecx = 0 is implemented in cpu_x86.s.
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func xgetbv() (eax, edx uint32)
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func xgetbv() (eax, edx uint32)
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const (
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// edx bits
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cpuid_SSE2 = 1 << 26
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// ecx bits
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cpuid_SSE3 = 1 << 0
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cpuid_PCLMULQDQ = 1 << 1
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cpuid_SSSE3 = 1 << 9
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cpuid_FMA = 1 << 12
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cpuid_SSE41 = 1 << 19
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cpuid_SSE42 = 1 << 20
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cpuid_POPCNT = 1 << 23
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cpuid_AES = 1 << 25
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cpuid_OSXSAVE = 1 << 27
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cpuid_AVX = 1 << 28
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// ebx bits
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cpuid_BMI1 = 1 << 3
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cpuid_AVX2 = 1 << 5
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cpuid_BMI2 = 1 << 8
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cpuid_ERMS = 1 << 9
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cpuid_ADX = 1 << 19
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)
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func doinit() {
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func doinit() {
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maxID, _, _, _ := cpuid(0, 0)
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maxID, _, _, _ := cpuid(0, 0)
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@ -22,40 +46,40 @@ func doinit() {
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}
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}
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_, _, ecx1, edx1 := cpuid(1, 0)
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_, _, ecx1, edx1 := cpuid(1, 0)
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X86.HasSSE2 = isSet(26, edx1)
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X86.HasSSE2 = isSet(edx1, cpuid_SSE2)
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X86.HasSSE3 = isSet(0, ecx1)
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X86.HasSSE3 = isSet(ecx1, cpuid_SSE3)
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X86.HasPCLMULQDQ = isSet(1, ecx1)
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X86.HasPCLMULQDQ = isSet(ecx1, cpuid_PCLMULQDQ)
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X86.HasSSSE3 = isSet(9, ecx1)
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X86.HasSSSE3 = isSet(ecx1, cpuid_SSSE3)
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X86.HasFMA = isSet(12, ecx1)
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X86.HasFMA = isSet(ecx1, cpuid_FMA)
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X86.HasSSE41 = isSet(19, ecx1)
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X86.HasSSE41 = isSet(ecx1, cpuid_SSE41)
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X86.HasSSE42 = isSet(20, ecx1)
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X86.HasSSE42 = isSet(ecx1, cpuid_SSE42)
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X86.HasPOPCNT = isSet(23, ecx1)
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X86.HasPOPCNT = isSet(ecx1, cpuid_POPCNT)
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X86.HasAES = isSet(25, ecx1)
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X86.HasAES = isSet(ecx1, cpuid_AES)
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X86.HasOSXSAVE = isSet(27, ecx1)
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X86.HasOSXSAVE = isSet(ecx1, cpuid_OSXSAVE)
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osSupportsAVX := false
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osSupportsAVX := false
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// For XGETBV, OSXSAVE bit is required and sufficient.
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// For XGETBV, OSXSAVE bit is required and sufficient.
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if X86.HasOSXSAVE {
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if X86.HasOSXSAVE {
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eax, _ := xgetbv()
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eax, _ := xgetbv()
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// Check if XMM and YMM registers have OS support.
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// Check if XMM and YMM registers have OS support.
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osSupportsAVX = isSet(1, eax) && isSet(2, eax)
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osSupportsAVX = isSet(eax, 1<<1) && isSet(eax, 1<<2)
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}
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}
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X86.HasAVX = isSet(28, ecx1) && osSupportsAVX
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X86.HasAVX = isSet(ecx1, cpuid_AVX) && osSupportsAVX
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if maxID < 7 {
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if maxID < 7 {
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return
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return
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}
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}
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_, ebx7, _, _ := cpuid(7, 0)
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_, ebx7, _, _ := cpuid(7, 0)
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X86.HasBMI1 = isSet(3, ebx7)
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X86.HasBMI1 = isSet(ebx7, cpuid_BMI1)
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X86.HasAVX2 = isSet(5, ebx7) && osSupportsAVX
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X86.HasAVX2 = isSet(ebx7, cpuid_AVX2) && osSupportsAVX
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X86.HasBMI2 = isSet(8, ebx7)
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X86.HasBMI2 = isSet(ebx7, cpuid_BMI2)
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X86.HasERMS = isSet(9, ebx7)
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X86.HasERMS = isSet(ebx7, cpuid_ERMS)
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X86.HasADX = isSet(19, ebx7)
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X86.HasADX = isSet(ebx7, cpuid_ADX)
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}
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}
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func isSet(bitpos uint, value uint32) bool {
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func isSet(hwc uint32, value uint32) bool {
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return value&(1<<bitpos) != 0
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return hwc&value != 0
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}
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}
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