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runtime/cgo: save and restore X3 (aka GP) for crosscall1 on riscv64

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The C code that is calling crosscall1 may depend on the GP register, which Go code
will currently clobber. Save and restore both X3 (aka GP) and X4 (aka TP) in this
code path (note that the Go code does not currently clobber X4, however there is
minimal downside to saving and restoring it here, which then also matches crosscall2).

Updates #47100

Change-Id: Icbb706d7889d5dc59de3efb2b510fa6ea2069496
Reviewed-on: https://go-review.googlesource.com/c/go/+/334870
Trust: Joel Sing <joel@sing.id.au>
Trust: Meng Zhuo <mzh@golangcn.org>
Reviewed-by: Meng Zhuo <mzh@golangcn.org>
Reviewed-by: Ian Lance Taylor <iant@golang.org>
Run-TryBot: Meng Zhuo <mzh@golangcn.org>
This commit is contained in:
Joel Sing 2021-07-16 02:56:08 +10:00 committed by Ian Lance Taylor
parent 6d02ce8584
commit 70493b3eb0
1 changed files with 56 additions and 52 deletions
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108
src/runtime/cgo/gcc_riscv64.S
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@ -8,36 +8,38 @@
* Calling into the gc tool chain, where all registers are caller save. * Calling into the gc tool chain, where all registers are caller save.
* Called from standard RISCV ELF psABI, where x8-x9, x18-x27, f8-f9 and * Called from standard RISCV ELF psABI, where x8-x9, x18-x27, f8-f9 and
* f18-f27 are callee-save, so they must be saved explicitly, along with * f18-f27 are callee-save, so they must be saved explicitly, along with
* x1 (LR). * x1 (LR), x3 (GP) and x4 (TP).
*/ */
.globl crosscall1 .globl crosscall1
crosscall1: crosscall1:
sd x1, -200(sp) sd x1, -216(sp)
addi sp, sp, -200 addi sp, sp, -216
sd x8, 8(sp) sd x3, 8(sp)
sd x9, 16(sp) sd x4, 16(sp)
sd x18, 24(sp) sd x8, 24(sp)
sd x19, 32(sp) sd x9, 32(sp)
sd x20, 40(sp) sd x18, 40(sp)
sd x21, 48(sp) sd x19, 48(sp)
sd x22, 56(sp) sd x20, 56(sp)
sd x23, 64(sp) sd x21, 64(sp)
sd x24, 72(sp) sd x22, 72(sp)
sd x25, 80(sp) sd x23, 80(sp)
sd x26, 88(sp) sd x24, 88(sp)
sd x27, 96(sp) sd x25, 96(sp)
fsd f8, 104(sp) sd x26, 104(sp)
fsd f9, 112(sp) sd x27, 112(sp)
fsd f18, 120(sp) fsd f8, 120(sp)
fsd f19, 128(sp) fsd f9, 128(sp)
fsd f20, 136(sp) fsd f18, 136(sp)
fsd f21, 144(sp) fsd f19, 144(sp)
fsd f22, 152(sp) fsd f20, 152(sp)
fsd f23, 160(sp) fsd f21, 160(sp)
fsd f24, 168(sp) fsd f22, 168(sp)
fsd f25, 176(sp) fsd f23, 176(sp)
fsd f26, 184(sp) fsd f24, 184(sp)
fsd f27, 192(sp) fsd f25, 192(sp)
fsd f26, 200(sp)
fsd f27, 208(sp)
// a0 = *fn, a1 = *setg_gcc, a2 = *g // a0 = *fn, a1 = *setg_gcc, a2 = *g
mv s1, a0 mv s1, a0
@ -47,31 +49,33 @@ crosscall1:
jalr ra, s1 // call fn jalr ra, s1 // call fn
ld x1, 0(sp) ld x1, 0(sp)
ld x8, 8(sp) ld x3, 8(sp)
ld x9, 16(sp) ld x4, 16(sp)
ld x18, 24(sp) ld x8, 24(sp)
ld x19, 32(sp) ld x9, 32(sp)
ld x20, 40(sp) ld x18, 40(sp)
ld x21, 48(sp) ld x19, 48(sp)
ld x22, 56(sp) ld x20, 56(sp)
ld x23, 64(sp) ld x21, 64(sp)
ld x24, 72(sp) ld x22, 72(sp)
ld x25, 80(sp) ld x23, 80(sp)
ld x26, 88(sp) ld x24, 88(sp)
ld x27, 96(sp) ld x25, 96(sp)
fld f8, 104(sp) ld x26, 104(sp)
fld f9, 112(sp) ld x27, 112(sp)
fld f18, 120(sp) fld f8, 120(sp)
fld f19, 128(sp) fld f9, 128(sp)
fld f20, 136(sp) fld f18, 136(sp)
fld f21, 144(sp) fld f19, 144(sp)
fld f22, 152(sp) fld f20, 152(sp)
fld f23, 160(sp) fld f21, 160(sp)
fld f24, 168(sp) fld f22, 168(sp)
fld f25, 176(sp) fld f23, 176(sp)
fld f26, 184(sp) fld f24, 184(sp)
fld f27, 192(sp) fld f25, 192(sp)
addi sp, sp, 200 fld f26, 200(sp)
fld f27, 208(sp)
addi sp, sp, 216
jr ra jr ra