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[dev.cc] 9l: make R_CALLPOWER like ELF's R_PPC64_REL24
These accomplished the same thing, but R_CALLPOWER expected the whole instruction to be in the addend (and completely overwrote what was in the text section), while R_PPC64_REL24 overwrites only bits 6 through 24 of whatever was in the text section. Make R_CALLPOWER work like R_PPC64_REL24 to ease the implementation of dynamic linking. LGTM=rsc R=rsc CC=golang-codereviews, minux https://golang.org/cl/177430043
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@ -65,14 +65,6 @@ needlib(char *name)
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int nelfsym = 1;
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int nelfsym = 1;
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// b is the addresses, a is the I-form branch instruction template, peform
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// addition so that the instruction jumps to address (offset) b.
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static int32
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braddoff(int32 a, int32 b)
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{
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return (((uint32)a) & 0xfc000003U) | (0x03fffffcU & (uint32)((a & 0x3fffffcU) + b));
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}
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void
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void
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adddynrela(LSym *rel, LSym *s, Reloc *r)
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adddynrela(LSym *rel, LSym *s, Reloc *r)
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{
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{
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@ -160,7 +152,19 @@ archreloc(Reloc *r, LSym *s, vlong *val)
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*val = ((vlong)o2 << 32) | o1;
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*val = ((vlong)o2 << 32) | o1;
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return 0;
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return 0;
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case R_CALLPOWER:
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case R_CALLPOWER:
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*val = braddoff((uint32)r->add, (int32)(symaddr(r->sym) - (s->value + r->off)));
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// Bits 6 through 29 = (S + A - P) >> 2
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if(ctxt->arch->endian == BigEndian)
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o1 = be32(s->p + r->off);
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else
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o1 = le32(s->p + r->off);
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t = symaddr(r->sym) + r->add - (s->value + r->off);
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if(t & 3)
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ctxt->diag("relocation for %s is not aligned: %lld", s->name, t);
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if(t << 6 >> 6 != t)
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ctxt->diag("relocation for %s is too big: %lld", s->name, t);
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*val = (o1 & 0xfc000003U) | (t & ~0xfc000003U);
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return 0;
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return 0;
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}
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}
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return -1;
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return -1;
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@ -1589,7 +1589,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out)
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ctxt->diag("odd branch target address\n%P", p);
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ctxt->diag("odd branch target address\n%P", p);
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v &= ~03;
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v &= ~03;
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}
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}
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rel->add = o1 | (v & 0x03FFFFFC);
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rel->add = v;
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rel->type = R_CALLPOWER;
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rel->type = R_CALLPOWER;
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}
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}
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break;
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break;
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