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sync/atomic: fix check64

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The LDREXD and STREXD instructions require
aligned addresses, and the ARM stack is not
guaranteed to be aligned during the check.
This may cause other problems later (on the ARM
not all 64-bit pointers may be 64-bit aligned)
but at least the check is correct now.

R=golang-dev, bradfitz
CC=golang-dev
https://golang.org/cl/4564053
This commit is contained in:
Russ Cox 2011-06-02 13:13:51 -04:00
parent f3c351982f
commit 69cb8fef43
1 changed files with 6 additions and 3 deletions
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9
src/pkg/sync/atomic/asm_arm.s
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@ -87,11 +87,14 @@ add64loop:
// which will make uses of the 64-bit atomic operations loop forever. // which will make uses of the 64-bit atomic operations loop forever.
// If things are working, set okLDREXD to avoid future checks. // If things are working, set okLDREXD to avoid future checks.
// https://bugs.launchpad.net/qemu/+bug/670883. // https://bugs.launchpad.net/qemu/+bug/670883.
TEXT check64<>(SB),7,$8 TEXT check64<>(SB),7,$16
MOVW $10, R1 MOVW $10, R1
// 8-aligned stack address scratch space.
MOVW $8(SP), R3
AND $~7, R3
loop: loop:
LDREXD (SP), R2 LDREXD (R3), R2
STREXD R2, (SP), R0 STREXD R2, (R3), R0
CMP $0, R0 CMP $0, R0
BEQ ok BEQ ok
SUB $1, R1 SUB $1, R1