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sync/atomic: fix check64
The LDREXD and STREXD instructions require aligned addresses, and the ARM stack is not guaranteed to be aligned during the check. This may cause other problems later (on the ARM not all 64-bit pointers may be 64-bit aligned) but at least the check is correct now. R=golang-dev, bradfitz CC=golang-dev https://golang.org/cl/4564053
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@ -87,11 +87,14 @@ add64loop:
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// which will make uses of the 64-bit atomic operations loop forever.
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// If things are working, set okLDREXD to avoid future checks.
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// https://bugs.launchpad.net/qemu/+bug/670883.
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TEXT check64<>(SB),7,$8
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TEXT check64<>(SB),7,$16
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MOVW $10, R1
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// 8-aligned stack address scratch space.
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MOVW $8(SP), R3
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AND $~7, R3
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loop:
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LDREXD (SP), R2
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STREXD R2, (SP), R0
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LDREXD (R3), R2
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STREXD R2, (R3), R0
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CMP $0, R0
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BEQ ok
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SUB $1, R1
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