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cmd/link: support PPC64 prefixed relocations for power10
Handle emitting (to ld) or resolving commonly used ELFv2 1.5 relocations. The new ISA provides PC relative addressing with 34 bit signed addresses, and many other relocations which can replace addis + d-form type relocations with a single prefixed instruction. Updates #44549 Change-Id: I7d4f4314d1082daa3938f4353826739be35b0e81 Reviewed-on: https://go-review.googlesource.com/c/go/+/355149 Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Matthew Dempsky <mdempsky@google.com> Run-TryBot: Paul Murphy <murp@ibm.com>
This commit is contained in:
Paul E. Murphy
Paul Murphy
parent
aa6240a445
commit
69abfab979
@ -208,6 +208,15 @@ const (
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// (usually called RB in X-form instructions) is assumed to be R13.
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R_POWER_TLS
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// R_POWER_TLS_IE_PCREL34 is similar to R_POWER_TLS_IE, but marks a single MOVD
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// which has been assembled as a single prefixed load doubleword without using the
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// TOC.
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R_POWER_TLS_IE_PCREL34
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// R_POWER_TLS_LE_TPREL34 is similar to R_POWER_TLS_LE, but computes an offset from
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// the thread pointer in one prefixed instruction.
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R_POWER_TLS_LE_TPREL34
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// R_ADDRPOWER_DS is similar to R_ADDRPOWER above, but assumes the second
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// instruction is a "DS-form" instruction, which has an immediate field occupying
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// bits [15:2] of the instruction word. Bits [15:2] of the address of the
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@ -215,11 +224,14 @@ const (
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// bits of the address are not 0.
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R_ADDRPOWER_DS
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// R_ADDRPOWER_PCREL relocates a D-form, DS-form instruction sequence like
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// R_ADDRPOWER_DS but inserts the offset of the GOT slot for the referenced symbol
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// from the TOC rather than the symbol's address.
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// R_ADDRPOWER_GOT relocates a D-form + DS-form instruction sequence by inserting
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// a relative displacement of referenced symbol's GOT entry to the TOC pointer.
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R_ADDRPOWER_GOT
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// R_ADDRPOWER_GOT_PCREL34 is identical to R_ADDRPOWER_GOT, but uses a PC relative
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// sequence to generate a GOT symbol addresss.
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R_ADDRPOWER_GOT_PCREL34
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// R_ADDRPOWER_PCREL relocates two D-form instructions like R_ADDRPOWER, but
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// inserts the displacement from the place being relocated to the address of the
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// relocated symbol instead of just its address.
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@ -235,6 +247,16 @@ const (
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// relocated symbol rather than the symbol's address.
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R_ADDRPOWER_TOCREL_DS
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// R_ADDRPOWER_D34 relocates a single prefixed D-form load/store operation. All
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// prefixed forms are D form. The high 18 bits are stored in the prefix,
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// and the low 16 are stored in the suffix. The address is absolute.
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R_ADDRPOWER_D34
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// R_ADDPOWER_PCREL34 relates a single prefixed D-form load/store/add operation.
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// All prefixed forms are D form. The resulting address is relative to the
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// PC. It is a signed 34 bit offset.
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R_ADDRPOWER_PCREL34
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// RISC-V.
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// R_RISCV_CALL relocates a J-type instruction with a 21 bit PC-relative
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@ -57,34 +57,39 @@ func _() {
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_ = x[R_POWER_TLS_LE-47]
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_ = x[R_POWER_TLS_IE-48]
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_ = x[R_POWER_TLS-49]
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_ = x[R_ADDRPOWER_DS-50]
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_ = x[R_ADDRPOWER_GOT-51]
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_ = x[R_ADDRPOWER_PCREL-52]
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_ = x[R_ADDRPOWER_TOCREL-53]
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_ = x[R_ADDRPOWER_TOCREL_DS-54]
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_ = x[R_RISCV_CALL-55]
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_ = x[R_RISCV_CALL_TRAMP-56]
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_ = x[R_RISCV_PCREL_ITYPE-57]
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_ = x[R_RISCV_PCREL_STYPE-58]
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_ = x[R_RISCV_TLS_IE_ITYPE-59]
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_ = x[R_RISCV_TLS_IE_STYPE-60]
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_ = x[R_PCRELDBL-61]
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_ = x[R_ADDRLOONG64-62]
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_ = x[R_ADDRLOONG64U-63]
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_ = x[R_ADDRLOONG64TLS-64]
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_ = x[R_ADDRLOONG64TLSU-65]
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_ = x[R_CALLLOONG64-66]
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_ = x[R_JMPLOONG64-67]
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_ = x[R_ADDRMIPSU-68]
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_ = x[R_ADDRMIPSTLS-69]
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_ = x[R_ADDRCUOFF-70]
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_ = x[R_WASMIMPORT-71]
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_ = x[R_XCOFFREF-72]
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_ = x[R_POWER_TLS_IE_PCREL34-50]
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_ = x[R_POWER_TLS_LE_TPREL34-51]
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_ = x[R_ADDRPOWER_DS-52]
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_ = x[R_ADDRPOWER_GOT-53]
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_ = x[R_ADDRPOWER_GOT_PCREL34-54]
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_ = x[R_ADDRPOWER_PCREL-55]
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_ = x[R_ADDRPOWER_TOCREL-56]
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_ = x[R_ADDRPOWER_TOCREL_DS-57]
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_ = x[R_ADDRPOWER_D34-58]
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_ = x[R_ADDRPOWER_PCREL34-59]
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_ = x[R_RISCV_CALL-60]
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_ = x[R_RISCV_CALL_TRAMP-61]
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_ = x[R_RISCV_PCREL_ITYPE-62]
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_ = x[R_RISCV_PCREL_STYPE-63]
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_ = x[R_RISCV_TLS_IE_ITYPE-64]
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_ = x[R_RISCV_TLS_IE_STYPE-65]
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_ = x[R_PCRELDBL-66]
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_ = x[R_ADDRLOONG64-67]
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_ = x[R_ADDRLOONG64U-68]
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_ = x[R_ADDRLOONG64TLS-69]
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_ = x[R_ADDRLOONG64TLSU-70]
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_ = x[R_CALLLOONG64-71]
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_ = x[R_JMPLOONG64-72]
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_ = x[R_ADDRMIPSU-73]
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_ = x[R_ADDRMIPSTLS-74]
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_ = x[R_ADDRCUOFF-75]
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_ = x[R_WASMIMPORT-76]
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_ = x[R_XCOFFREF-77]
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}
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const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF"
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const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USEGENERICIFACEMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_CALLR_RISCV_CALL_TRAMPR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRLOONG64R_ADDRLOONG64UR_ADDRLOONG64TLSR_ADDRLOONG64TLSUR_CALLLOONG64R_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF"
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var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 577, 592, 609, 627, 648, 660, 678, 697, 716, 736, 756, 766, 779, 793, 809, 826, 839, 851, 862, 875, 886, 898, 908}
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var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 233, 244, 250, 261, 271, 280, 293, 307, 321, 335, 351, 362, 375, 394, 414, 434, 454, 467, 481, 495, 509, 524, 538, 552, 563, 585, 607, 621, 636, 659, 676, 694, 715, 730, 749, 761, 779, 798, 817, 837, 857, 867, 880, 894, 910, 927, 940, 952, 963, 976, 987, 999, 1009}
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func (i RelocType) String() string {
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i -= 1
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@ -727,6 +727,10 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym,
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default:
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return false
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}
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case objabi.R_ADDRPOWER_D34:
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out.Write64(uint64(elf.R_PPC64_D34) | uint64(elfsym)<<32)
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case objabi.R_ADDRPOWER_PCREL34:
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out.Write64(uint64(elf.R_PPC64_PCREL34) | uint64(elfsym)<<32)
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case objabi.R_POWER_TLS:
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out.Write64(uint64(elf.R_PPC64_TLS) | uint64(elfsym)<<32)
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case objabi.R_POWER_TLS_LE:
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@ -734,6 +738,10 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym,
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out.Write64(uint64(r.Xadd))
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out.Write64(uint64(sectoff + 4))
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out.Write64(uint64(elf.R_PPC64_TPREL16_LO) | uint64(elfsym)<<32)
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case objabi.R_POWER_TLS_LE_TPREL34:
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out.Write64(uint64(elf.R_PPC64_TPREL34) | uint64(elfsym)<<32)
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case objabi.R_POWER_TLS_IE_PCREL34:
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out.Write64(uint64(elf.R_PPC64_GOT_TPREL_PCREL34) | uint64(elfsym)<<32)
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case objabi.R_POWER_TLS_IE:
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out.Write64(uint64(elf.R_PPC64_GOT_TPREL16_HA) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd))
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@ -888,48 +896,41 @@ func archrelocaddr(ldr *loader.Loader, target *ld.Target, syms *ld.ArchSyms, r l
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if target.IsAIX() {
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ldr.Errorf(s, "archrelocaddr called for %s relocation\n", ldr.SymName(rs))
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}
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var o1, o2 uint32
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if target.IsBigEndian() {
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o1 = uint32(val >> 32)
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o2 = uint32(val)
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} else {
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o1 = uint32(val)
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o2 = uint32(val >> 32)
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}
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// We are spreading a 31-bit address across two instructions, putting the
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// high (adjusted) part in the low 16 bits of the first instruction and the
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// low part in the low 16 bits of the second instruction, or, in the DS case,
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// bits 15-2 (inclusive) of the address into bits 15-2 of the second
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// instruction (it is an error in this case if the low 2 bits of the address
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// are non-zero).
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o1, o2 := unpackInstPair(target, val)
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// Verify resulting address fits within a 31 bit (2GB) address space.
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// This is a restriction arising from the usage of lis (HA) + d-form
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// (LO) instruction sequences used to implement absolute relocations
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// on PPC64 prior to ISA 3.1 (P10). For consistency, maintain this
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// restriction for ISA 3.1 unless it becomes problematic.
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t := ldr.SymAddr(rs) + r.Add()
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if t < 0 || t >= 1<<31 {
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ldr.Errorf(s, "relocation for %s is too big (>=2G): 0x%x", ldr.SymName(s), ldr.SymValue(rs))
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}
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if t&0x8000 != 0 {
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t += 0x10000
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}
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switch r.Type() {
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case objabi.R_ADDRPOWER_PCREL34:
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// S + A - P
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t -= (ldr.SymValue(s) + int64(r.Off()))
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o1 |= computePrefix34HI(t)
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o2 |= computeLO(int32(t))
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case objabi.R_ADDRPOWER_D34:
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o1 |= computePrefix34HI(t)
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o2 |= computeLO(int32(t))
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case objabi.R_ADDRPOWER:
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o1 |= (uint32(t) >> 16) & 0xffff
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o2 |= uint32(t) & 0xffff
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o1 |= computeHA(int32(t))
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o2 |= computeLO(int32(t))
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case objabi.R_ADDRPOWER_DS:
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o1 |= (uint32(t) >> 16) & 0xffff
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o1 |= computeHA(int32(t))
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o2 |= computeLO(int32(t))
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if t&3 != 0 {
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ldr.Errorf(s, "bad DS reloc for %s: %d", ldr.SymName(s), ldr.SymValue(rs))
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}
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o2 |= uint32(t) & 0xfffc
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default:
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return -1
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}
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if target.IsBigEndian() {
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return int64(o1)<<32 | int64(o2)
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}
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return int64(o2)<<32 | int64(o1)
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return packInstPair(target, o1, o2)
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}
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// Determine if the code was compiled so that the TOC register R2 is initialized and maintained
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@ -1084,6 +1085,61 @@ func gentramp(ctxt *ld.Link, ldr *loader.Loader, tramp *loader.SymbolBuilder, ta
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tramp.SetData(P)
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}
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// Unpack a pair of 32 bit instruction words from
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// a 64 bit relocation into instN and instN+1 in endian order.
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func unpackInstPair(target *ld.Target, r int64) (uint32, uint32) {
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if target.IsBigEndian() {
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return uint32(r >> 32), uint32(r)
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}
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return uint32(r), uint32(r >> 32)
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}
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// Pack a pair of 32 bit instruction words o1, o2 into 64 bit relocation
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// in endian order.
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func packInstPair(target *ld.Target, o1, o2 uint32) int64 {
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if target.IsBigEndian() {
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return (int64(o1) << 32) | int64(o2)
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}
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return int64(o1) | (int64(o2) << 32)
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}
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// Compute the high-adjusted value (always a signed 32b value) per the ELF ABI.
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// The returned value is always 0 <= x <= 0xFFFF.
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func computeHA(val int32) uint32 {
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return uint32(uint16((val + 0x8000) >> 16))
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}
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// Compute the low value (the lower 16 bits of any 32b value) per the ELF ABI.
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// The returned value is always 0 <= x <= 0xFFFF.
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func computeLO(val int32) uint32 {
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return uint32(uint16(val))
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}
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// Compute the high 18 bits of a signed 34b constant. Used to pack the high 18 bits
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// of a prefix34 relocation field. This assumes the input is already restricted to
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// 34 bits.
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func computePrefix34HI(val int64) uint32 {
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return uint32((val >> 16) & 0x3FFFF)
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}
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func computeTLSLEReloc(target *ld.Target, ldr *loader.Loader, rs, s loader.Sym) int64 {
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// The thread pointer points 0x7000 bytes after the start of the
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// thread local storage area as documented in section "3.7.2 TLS
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// Runtime Handling" of "Power Architecture 64-Bit ELF V2 ABI
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// Specification".
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v := ldr.SymValue(rs) - 0x7000
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if target.IsAIX() {
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// On AIX, the thread pointer points 0x7800 bytes after
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// the TLS.
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v -= 0x800
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}
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if int64(int32(v)) != v {
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ldr.Errorf(s, "TLS offset out of range %d", v)
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}
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return v
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}
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func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loader.Reloc, s loader.Sym, val int64) (relocatedOffset int64, nExtReloc int, ok bool) {
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rs := r.Sym()
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if target.IsExternal() {
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@ -1094,7 +1150,7 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade
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if !target.IsAIX() {
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return val, nExtReloc, false
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}
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case objabi.R_POWER_TLS:
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case objabi.R_POWER_TLS, objabi.R_POWER_TLS_IE_PCREL34, objabi.R_POWER_TLS_LE_TPREL34:
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nExtReloc = 1
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return val, nExtReloc, true
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case objabi.R_POWER_TLS_LE, objabi.R_POWER_TLS_IE:
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@ -1125,7 +1181,7 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade
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if !target.IsAIX() {
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return val, nExtReloc, true
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}
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case objabi.R_CALLPOWER:
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case objabi.R_CALLPOWER, objabi.R_ADDRPOWER_D34, objabi.R_ADDRPOWER_PCREL34:
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nExtReloc = 1
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if !target.IsAIX() {
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return val, nExtReloc, true
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@ -1136,7 +1192,7 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade
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switch r.Type() {
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case objabi.R_ADDRPOWER_TOCREL, objabi.R_ADDRPOWER_TOCREL_DS:
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return archreloctoc(ldr, target, syms, r, s, val), nExtReloc, true
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case objabi.R_ADDRPOWER, objabi.R_ADDRPOWER_DS:
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case objabi.R_ADDRPOWER, objabi.R_ADDRPOWER_DS, objabi.R_ADDRPOWER_D34, objabi.R_ADDRPOWER_PCREL34:
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return archrelocaddr(ldr, target, syms, r, s, val), nExtReloc, true
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case objabi.R_CALLPOWER:
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// Bits 6 through 29 = (S + A - P) >> 2
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@ -1169,16 +1225,10 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade
|
||||
|
||||
case objabi.R_ADDRPOWER_PCREL: // S + A - P
|
||||
t := ldr.SymValue(rs) + r.Add() - (ldr.SymValue(s) + int64(r.Off()))
|
||||
ha := uint16(((t + 0x8000) >> 16) & 0xFFFF)
|
||||
l := uint16(t)
|
||||
if target.IsBigEndian() {
|
||||
val |= int64(l)
|
||||
val |= int64(ha) << 32
|
||||
} else {
|
||||
val |= int64(ha)
|
||||
val |= int64(l) << 32
|
||||
}
|
||||
return val, nExtReloc, true
|
||||
ha, l := unpackInstPair(target, val)
|
||||
l |= computeLO(int32(t))
|
||||
ha |= computeHA(int32(t))
|
||||
return packInstPair(target, ha, l), nExtReloc, true
|
||||
|
||||
case objabi.R_POWER_TLS:
|
||||
const OP_ADD = 31<<26 | 266<<1
|
||||
@ -1210,50 +1260,48 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade
|
||||
const OP_ADDI = 14 << 26
|
||||
const OP_MASK = 0x3F << 26
|
||||
const OP_RA_MASK = 0x1F << 16
|
||||
uval := uint64(val)
|
||||
// convert r2 to r0, and ld to addi
|
||||
if target.IsBigEndian() {
|
||||
uval = uval &^ (OP_RA_MASK << 32)
|
||||
uval = (uval &^ OP_MASK) | OP_ADDI
|
||||
} else {
|
||||
uval = uval &^ (OP_RA_MASK)
|
||||
uval = (uval &^ (OP_MASK << 32)) | (OP_ADDI << 32)
|
||||
}
|
||||
val = int64(uval)
|
||||
// Treat this like an R_POWER_TLS_LE relocation now.
|
||||
mask := packInstPair(target, OP_RA_MASK, OP_MASK)
|
||||
addi_op := packInstPair(target, 0, OP_ADDI)
|
||||
val &^= mask
|
||||
val |= addi_op
|
||||
fallthrough
|
||||
|
||||
case objabi.R_POWER_TLS_LE:
|
||||
// The thread pointer points 0x7000 bytes after the start of the
|
||||
// thread local storage area as documented in section "3.7.2 TLS
|
||||
// Runtime Handling" of "Power Architecture 64-Bit ELF V2 ABI
|
||||
// Specification".
|
||||
v := ldr.SymValue(rs) - 0x7000
|
||||
if target.IsAIX() {
|
||||
// On AIX, the thread pointer points 0x7800 bytes after
|
||||
// the TLS.
|
||||
v -= 0x800
|
||||
v := computeTLSLEReloc(target, ldr, rs, s)
|
||||
o1, o2 := unpackInstPair(target, val)
|
||||
o1 |= computeHA(int32(v))
|
||||
o2 |= computeLO(int32(v))
|
||||
return packInstPair(target, o1, o2), nExtReloc, true
|
||||
|
||||
case objabi.R_POWER_TLS_IE_PCREL34:
|
||||
// Convert TLS_IE relocation to TLS_LE if supported.
|
||||
if !(target.IsPIE() && target.IsElf()) {
|
||||
log.Fatalf("cannot handle R_POWER_TLS_IE (sym %s) when linking non-PIE, non-ELF binaries internally", ldr.SymName(s))
|
||||
}
|
||||
|
||||
var o1, o2 uint32
|
||||
if int64(int32(v)) != v {
|
||||
ldr.Errorf(s, "TLS offset out of range %d", v)
|
||||
}
|
||||
if target.IsBigEndian() {
|
||||
o1 = uint32(val >> 32)
|
||||
o2 = uint32(val)
|
||||
} else {
|
||||
o1 = uint32(val)
|
||||
o2 = uint32(val >> 32)
|
||||
}
|
||||
// We are an ELF binary, we can safely convert to TLS_LE_TPREL34 from:
|
||||
// pld rX, x@got@tprel@pcrel
|
||||
//
|
||||
// to TLS_LE_TPREL32 by converting to:
|
||||
// pla rX, x@tprel
|
||||
|
||||
o1 |= uint32(((v + 0x8000) >> 16) & 0xFFFF)
|
||||
o2 |= uint32(v & 0xFFFF)
|
||||
const OP_MASK_PFX = 0xFFFFFFFF // Discard prefix word
|
||||
const OP_MASK = (0x3F << 26) | 0xFFFF // Preserve RT, RA
|
||||
const OP_PFX = 1<<26 | 2<<24
|
||||
const OP_PLA = 14 << 26
|
||||
mask := packInstPair(target, OP_MASK_PFX, OP_MASK)
|
||||
pla_op := packInstPair(target, OP_PFX, OP_PLA)
|
||||
val &^= mask
|
||||
val |= pla_op
|
||||
fallthrough
|
||||
|
||||
if target.IsBigEndian() {
|
||||
return int64(o1)<<32 | int64(o2), nExtReloc, true
|
||||
}
|
||||
return int64(o2)<<32 | int64(o1), nExtReloc, true
|
||||
case objabi.R_POWER_TLS_LE_TPREL34:
|
||||
v := computeTLSLEReloc(target, ldr, rs, s)
|
||||
o1, o2 := unpackInstPair(target, val)
|
||||
o1 |= computePrefix34HI(v)
|
||||
o2 |= computeLO(int32(v))
|
||||
return packInstPair(target, o1, o2), nExtReloc, true
|
||||
}
|
||||
|
||||
return val, nExtReloc, false
|
||||
@ -1354,14 +1402,16 @@ overflow:
|
||||
|
||||
func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sym) (loader.ExtReloc, bool) {
|
||||
switch r.Type() {
|
||||
case objabi.R_POWER_TLS, objabi.R_POWER_TLS_LE, objabi.R_POWER_TLS_IE, objabi.R_CALLPOWER:
|
||||
case objabi.R_POWER_TLS, objabi.R_POWER_TLS_LE, objabi.R_POWER_TLS_IE, objabi.R_POWER_TLS_IE_PCREL34, objabi.R_POWER_TLS_LE_TPREL34, objabi.R_CALLPOWER:
|
||||
return ld.ExtrelocSimple(ldr, r), true
|
||||
case objabi.R_ADDRPOWER,
|
||||
objabi.R_ADDRPOWER_DS,
|
||||
objabi.R_ADDRPOWER_TOCREL,
|
||||
objabi.R_ADDRPOWER_TOCREL_DS,
|
||||
objabi.R_ADDRPOWER_GOT,
|
||||
objabi.R_ADDRPOWER_PCREL:
|
||||
objabi.R_ADDRPOWER_PCREL,
|
||||
objabi.R_ADDRPOWER_D34,
|
||||
objabi.R_ADDRPOWER_PCREL34:
|
||||
return ld.ExtrelocViaOuterSym(ldr, r, s), true
|
||||
}
|
||||
return loader.ExtReloc{}, false
|
||||
|
||||
Loading…
Reference in New Issue
Block a user