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[dev.ssa] cmd/compile: truncate when converting floats to ints

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Modified to use the truncating conversion.

Fixes reflect.

Change-Id: I47bf3200abc2d2c662939a2a2351e2ff84168f4a
Reviewed-on: https://go-review.googlesource.com/14167
Reviewed-by: David Chase <drchase@google.com>
This commit is contained in:
Todd Neal 2015-09-01 19:05:44 -05:00
parent 4219aba5db
commit 634b50c6e1
6 changed files with 46 additions and 43 deletions
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2
src/cmd/compile/internal/gc/ssa.go
View File

@ -3045,7 +3045,7 @@ func genValue(v *ssa.Value) {
addAux(&p.To, v)
case ssa.OpAMD64MOVLQSX, ssa.OpAMD64MOVWQSX, ssa.OpAMD64MOVBQSX, ssa.OpAMD64MOVLQZX, ssa.OpAMD64MOVWQZX, ssa.OpAMD64MOVBQZX,
ssa.OpAMD64CVTSL2SS, ssa.OpAMD64CVTSL2SD, ssa.OpAMD64CVTSQ2SS, ssa.OpAMD64CVTSQ2SD,
ssa.OpAMD64CVTSS2SL, ssa.OpAMD64CVTSD2SL, ssa.OpAMD64CVTSS2SQ, ssa.OpAMD64CVTSD2SQ,
ssa.OpAMD64CVTTSS2SL, ssa.OpAMD64CVTTSD2SL, ssa.OpAMD64CVTTSS2SQ, ssa.OpAMD64CVTTSD2SQ,
ssa.OpAMD64CVTSS2SD, ssa.OpAMD64CVTSD2SS:
opregreg(v.Op.Asm(), regnum(v), regnum(v.Args[0]))
case ssa.OpAMD64MOVXzero:

3
src/cmd/compile/internal/gc/testdata/fp_ssa.go vendored
View File

@ -1179,7 +1179,10 @@ func floatsToUints(x float64, expected uint64) int {
func floatingToIntegerConversionsTest() int {
fails := 0
fails += floatsToInts(0.0, 0)
fails += floatsToInts(0.5, 0)
fails += floatsToInts(0.9, 0)
fails += floatsToInts(1.0, 1)
fails += floatsToInts(1.5, 1)
fails += floatsToInts(127.0, 127)
fails += floatsToInts(-1.0, -1)
fails += floatsToInts(-128.0, -128)

8
src/cmd/compile/internal/ssa/gen/AMD64.rules
View File

@ -109,10 +109,10 @@
(Cvt64to32F x) -> (CVTSQ2SS x)
(Cvt64to64F x) -> (CVTSQ2SD x)
(Cvt32Fto32 x) -> (CVTSS2SL x)
(Cvt32Fto64 x) -> (CVTSS2SQ x)
(Cvt64Fto32 x) -> (CVTSD2SL x)
(Cvt64Fto64 x) -> (CVTSD2SQ x)
(Cvt32Fto32 x) -> (CVTTSS2SL x)
(Cvt32Fto64 x) -> (CVTTSS2SQ x)
(Cvt64Fto32 x) -> (CVTTSD2SL x)
(Cvt64Fto64 x) -> (CVTTSD2SQ x)
(Cvt32Fto64F x) -> (CVTSS2SD x)
(Cvt64Fto32F x) -> (CVTSD2SS x)

20
src/cmd/compile/internal/ssa/gen/AMD64Ops.go
View File

@ -346,16 +346,16 @@ func init() {
{name: "MOVLconst", reg: gp01flags, asm: "MOVL"}, // 32 low bits of auxint
{name: "MOVQconst", reg: gp01flags, asm: "MOVQ"}, // auxint
{name: "CVTSD2SL", reg: fpgp, asm: "CVTSD2SL"}, // convert float64 to int32
{name: "CVTSD2SQ", reg: fpgp, asm: "CVTSD2SQ"}, // convert float64 to int64
{name: "CVTSS2SL", reg: fpgp, asm: "CVTSS2SL"}, // convert float32 to int32
{name: "CVTSS2SQ", reg: fpgp, asm: "CVTSS2SQ"}, // convert float32 to int64
{name: "CVTSL2SS", reg: gpfp, asm: "CVTSL2SS"}, // convert int32 to float32
{name: "CVTSL2SD", reg: gpfp, asm: "CVTSL2SD"}, // convert int32 to float64
{name: "CVTSQ2SS", reg: gpfp, asm: "CVTSQ2SS"}, // convert int64 to float32
{name: "CVTSQ2SD", reg: gpfp, asm: "CVTSQ2SD"}, // convert int64 to float64
{name: "CVTSD2SS", reg: fp11, asm: "CVTSD2SS"}, // convert float64 to float32
{name: "CVTSS2SD", reg: fp11, asm: "CVTSS2SD"}, // convert float32 to float64
{name: "CVTTSD2SL", reg: fpgp, asm: "CVTTSD2SL"}, // convert float64 to int32
{name: "CVTTSD2SQ", reg: fpgp, asm: "CVTTSD2SQ"}, // convert float64 to int64
{name: "CVTTSS2SL", reg: fpgp, asm: "CVTTSS2SL"}, // convert float32 to int32
{name: "CVTTSS2SQ", reg: fpgp, asm: "CVTTSS2SQ"}, // convert float32 to int64
{name: "CVTSL2SS", reg: gpfp, asm: "CVTSL2SS"}, // convert int32 to float32
{name: "CVTSL2SD", reg: gpfp, asm: "CVTSL2SD"}, // convert int32 to float64
{name: "CVTSQ2SS", reg: gpfp, asm: "CVTSQ2SS"}, // convert int64 to float32
{name: "CVTSQ2SD", reg: gpfp, asm: "CVTSQ2SD"}, // convert int64 to float64
{name: "CVTSD2SS", reg: fp11, asm: "CVTSD2SS"}, // convert float64 to float32
{name: "CVTSS2SD", reg: fp11, asm: "CVTSS2SD"}, // convert float32 to float64
{name: "PXOR", reg: fp21, asm: "PXOR"}, // exclusive or, applied to X regs for float negation.

24
src/cmd/compile/internal/ssa/opGen.go
View File

@ -227,10 +227,10 @@ const (
OpAMD64MOVWconst
OpAMD64MOVLconst
OpAMD64MOVQconst
OpAMD64CVTSD2SL
OpAMD64CVTSD2SQ
OpAMD64CVTSS2SL
OpAMD64CVTSS2SQ
OpAMD64CVTTSD2SL
OpAMD64CVTTSD2SQ
OpAMD64CVTTSS2SL
OpAMD64CVTTSS2SQ
OpAMD64CVTSL2SS
OpAMD64CVTSL2SD
OpAMD64CVTSQ2SS
@ -2682,8 +2682,8 @@ var opcodeTable = [...]opInfo{
},
},
{
name: "CVTSD2SL",
asm: x86.ACVTSD2SL,
name: "CVTTSD2SL",
asm: x86.ACVTTSD2SL,
reg: regInfo{
inputs: []inputInfo{
{0, 4294901760}, // .X0 .X1 .X2 .X3 .X4 .X5 .X6 .X7 .X8 .X9 .X10 .X11 .X12 .X13 .X14 .X15
@ -2694,8 +2694,8 @@ var opcodeTable = [...]opInfo{
},
},
{
name: "CVTSD2SQ",
asm: x86.ACVTSD2SQ,
name: "CVTTSD2SQ",
asm: x86.ACVTTSD2SQ,
reg: regInfo{
inputs: []inputInfo{
{0, 4294901760}, // .X0 .X1 .X2 .X3 .X4 .X5 .X6 .X7 .X8 .X9 .X10 .X11 .X12 .X13 .X14 .X15
@ -2706,8 +2706,8 @@ var opcodeTable = [...]opInfo{
},
},
{
name: "CVTSS2SL",
asm: x86.ACVTSS2SL,
name: "CVTTSS2SL",
asm: x86.ACVTTSS2SL,
reg: regInfo{
inputs: []inputInfo{
{0, 4294901760}, // .X0 .X1 .X2 .X3 .X4 .X5 .X6 .X7 .X8 .X9 .X10 .X11 .X12 .X13 .X14 .X15
@ -2718,8 +2718,8 @@ var opcodeTable = [...]opInfo{
},
},
{
name: "CVTSS2SQ",
asm: x86.ACVTSS2SQ,
name: "CVTTSS2SQ",
asm: x86.ACVTTSS2SQ,
reg: regInfo{
inputs: []inputInfo{
{0, 4294901760}, // .X0 .X1 .X2 .X3 .X4 .X5 .X6 .X7 .X8 .X9 .X10 .X11 .X12 .X13 .X14 .X15

32
src/cmd/compile/internal/ssa/rewriteAMD64.go
View File

@ -1694,34 +1694,34 @@ func rewriteValueAMD64(v *Value, config *Config) bool {
case OpCvt32Fto32:
// match: (Cvt32Fto32 x)
// cond:
// result: (CVTSS2SL x)
// result: (CVTTSS2SL x)
{
x := v.Args[0]
v.Op = OpAMD64CVTSS2SL
v.Op = OpAMD64CVTTSS2SL
v.AuxInt = 0
v.Aux = nil
v.resetArgs()
v.AddArg(x)
return true
}
goto endad55e2986dea26975574ee27f4976d5e
endad55e2986dea26975574ee27f4976d5e:
goto enda410209d31804e1bce7bdc235fc62342
enda410209d31804e1bce7bdc235fc62342:
;
case OpCvt32Fto64:
// match: (Cvt32Fto64 x)
// cond:
// result: (CVTSS2SQ x)
// result: (CVTTSS2SQ x)
{
x := v.Args[0]
v.Op = OpAMD64CVTSS2SQ
v.Op = OpAMD64CVTTSS2SQ
v.AuxInt = 0
v.Aux = nil
v.resetArgs()
v.AddArg(x)
return true
}
goto end227800dc831e0b4ef80fa315133c0991
end227800dc831e0b4ef80fa315133c0991:
goto enddb02fa4f3230a14d557d6c90cdadd523
enddb02fa4f3230a14d557d6c90cdadd523:
;
case OpCvt32Fto64F:
// match: (Cvt32Fto64F x)
@ -1774,18 +1774,18 @@ func rewriteValueAMD64(v *Value, config *Config) bool {
case OpCvt64Fto32:
// match: (Cvt64Fto32 x)
// cond:
// result: (CVTSD2SL x)
// result: (CVTTSD2SL x)
{
x := v.Args[0]
v.Op = OpAMD64CVTSD2SL
v.Op = OpAMD64CVTTSD2SL
v.AuxInt = 0
v.Aux = nil
v.resetArgs()
v.AddArg(x)
return true
}
goto end1ce5fd52f29d5a42d1aa08d7ac53e49e
end1ce5fd52f29d5a42d1aa08d7ac53e49e:
goto endc213dd690dfe568607dec717b2c385b7
endc213dd690dfe568607dec717b2c385b7:
;
case OpCvt64Fto32F:
// match: (Cvt64Fto32F x)
@ -1806,18 +1806,18 @@ func rewriteValueAMD64(v *Value, config *Config) bool {
case OpCvt64Fto64:
// match: (Cvt64Fto64 x)
// cond:
// result: (CVTSD2SQ x)
// result: (CVTTSD2SQ x)
{
x := v.Args[0]
v.Op = OpAMD64CVTSD2SQ
v.Op = OpAMD64CVTTSD2SQ
v.AuxInt = 0
v.Aux = nil
v.resetArgs()
v.AddArg(x)
return true
}
goto end8239c11ce860dc3b5417d4d2ae59386a
end8239c11ce860dc3b5417d4d2ae59386a:
goto end0bf3e4468047fd20714266ff05797454
end0bf3e4468047fd20714266ff05797454:
;
case OpCvt64to32F:
// match: (Cvt64to32F x)