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cmd/compile: don't fold address of global into load/store on PPC64

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On PPC64 (and a few other architectures), accessing global
requires multiple instructions and use of temp register.
The compiler emits a single MOV prog, and the assembler
expands it to multiple instructions. If globals are accessed
multiple times, each time it generates a reload of the temp
register. As this is done by the assembler, the compiler
cannot optimize it.

This CL makes the compiler not fold address of global into load
and store. If a global is accessed multiple times, or multiple
fields of a struct are accessed, the compiler can CSE the
address. Currently, this doesn't help the case where different
globals are accessed, even though they may be close to each
other in the address space (which we don't know at compile time).

It helps a little bit in go1 benchmark:

name                     old time/op    new time/op    delta
BinaryTree17-2              4.84s ± 1%     4.84s ± 1%    ~     (p=0.796 n=10+10)
Fannkuch11-2                4.10s ± 0%     4.08s ± 0%  -0.58%  (p=0.000 n=9+8)
FmtFprintfEmpty-2          97.9ns ± 1%    96.8ns ± 1%  -1.08%  (p=0.000 n=10+10)
FmtFprintfString-2          147ns ± 0%     147ns ± 1%    ~     (p=0.129 n=9+10)
FmtFprintfInt-2             152ns ± 0%     152ns ± 0%    ~     (p=0.294 n=10+8)
FmtFprintfIntInt-2          218ns ± 1%     217ns ± 0%  -0.64%  (p=0.000 n=10+8)
FmtFprintfPrefixedInt-2     263ns ± 1%     256ns ± 0%  -2.77%  (p=0.000 n=10+8)
FmtFprintfFloat-2           375ns ± 1%     368ns ± 0%  -1.95%  (p=0.000 n=10+7)
FmtManyArgs-2               849ns ± 0%     850ns ± 0%    ~     (p=0.621 n=8+9)
GobDecode-2                12.3ms ± 1%    12.2ms ± 1%  -0.94%  (p=0.003 n=10+10)
GobEncode-2                10.3ms ± 1%    10.5ms ± 1%  +2.03%  (p=0.000 n=10+10)
Gzip-2                      414ms ± 1%     414ms ± 0%    ~     (p=0.842 n=9+10)
Gunzip-2                   66.3ms ± 0%    66.4ms ± 0%    ~     (p=0.077 n=9+9)
HTTPClientServer-2         66.3µs ± 5%    66.4µs ± 1%    ~     (p=0.661 n=10+9)
JSONEncode-2               23.9ms ± 1%    23.9ms ± 1%    ~     (p=0.905 n=10+9)
JSONDecode-2                119ms ± 1%     116ms ± 0%  -2.65%  (p=0.000 n=10+10)
Mandelbrot200-2            5.11ms ± 0%    4.92ms ± 0%  -3.71%  (p=0.000 n=10+10)
GoParse-2                  5.81ms ± 1%    5.84ms ± 1%    ~     (p=0.052 n=10+10)
RegexpMatchEasy0_32-2       315ns ± 0%     317ns ± 0%  +0.67%  (p=0.000 n=10+10)
RegexpMatchEasy0_1K-2       658ns ± 0%     638ns ± 0%  -3.01%  (p=0.000 n=9+9)
RegexpMatchEasy1_32-2       315ns ± 1%     317ns ± 0%  +0.56%  (p=0.000 n=9+9)
RegexpMatchEasy1_1K-2       935ns ± 0%     926ns ± 0%  -0.96%  (p=0.000 n=9+9)
RegexpMatchMedium_32-2      394ns ± 0%     396ns ± 1%  +0.46%  (p=0.001 n=10+10)
RegexpMatchMedium_1K-2     65.1µs ± 0%    64.5µs ± 0%  -0.90%  (p=0.000 n=9+9)
RegexpMatchHard_32-2       3.16µs ± 0%    3.17µs ± 0%  +0.35%  (p=0.000 n=10+9)
RegexpMatchHard_1K-2       89.4µs ± 0%    89.3µs ± 0%    ~     (p=0.136 n=9+9)
Revcomp-2                   703ms ± 2%     694ms ± 2%  -1.41%  (p=0.009 n=10+10)
Template-2                  107ms ± 1%     107ms ± 1%    ~     (p=0.053 n=9+10)
TimeParse-2                 526ns ± 0%     524ns ± 0%  -0.34%  (p=0.002 n=9+9)
TimeFormat-2                534ns ± 0%     504ns ± 1%  -5.51%  (p=0.000 n=10+10)
[Geo mean]                 93.8µs         93.1µs       -0.70%

It also helps in the case mentioned in issue #17110, main.main
in package math's test. Now it generates 4 loads of R31 instead
of 10, for the same piece of code.

This causes a slight increase of binary size: cmd/go increases
0.66%.

If this is a good idea, we should do it on other architectures
where accessing global is expensive.

Updates #17110.

Change-Id: I2687af6eafc04f2a57c19781ec300c33567094b6
Reviewed-on: https://go-review.googlesource.com/68250
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
This commit is contained in:
Cherry Zhang 2017-10-04 14:33:10 -04:00
parent 4745604bcb
commit 622cfd8833
2 changed files with 185 additions and 162 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

59
src/cmd/compile/internal/ssa/gen/PPC64.rules
View File

@ -760,35 +760,54 @@
(FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) && is16Bit(off1+off2) -> (FMOVSstore [off1+off2] {sym} ptr val mem) (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) && is16Bit(off1+off2) -> (FMOVSstore [off1+off2] {sym} ptr val mem)
(FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) && is16Bit(off1+off2) -> (FMOVDstore [off1+off2] {sym} ptr val mem) (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) && is16Bit(off1+off2) -> (FMOVDstore [off1+off2] {sym} ptr val mem)
(MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> // Fold address into load/store.
// The assembler needs to generate several instructions and use
// temp register for accessing global, and each time it will reload
// the temp register. So don't fold address of global, unless there
// is only one use.
(MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
(MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
(MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
(MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
(FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
(FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) -> (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
(MOVBZload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
(MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
(MOVHZload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
(MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
(MOVWZload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
(MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
(FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
(FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) -> (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)
&& (ptr.Op != OpSB || p.Uses == 1) ->
(FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
// Fold offsets for loads. // Fold offsets for loads.
@ -819,13 +838,17 @@
(MOVBstorezero [off1+off2] {sym} x mem) (MOVBstorezero [off1+off2] {sym} x mem)
// Fold symbols into storezero // Fold symbols into storezero
(MOVDstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} x) mem) && canMergeSym(sym1,sym2) -> (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem) && canMergeSym(sym1,sym2)
&& (x.Op != OpSB || p.Uses == 1) ->
(MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem) (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
(MOVWstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} x) mem) && canMergeSym(sym1,sym2) -> (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem) && canMergeSym(sym1,sym2)
&& (x.Op != OpSB || p.Uses == 1) ->
(MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem) (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
(MOVHstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} x) mem) && canMergeSym(sym1,sym2) -> (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem) && canMergeSym(sym1,sym2)
&& (x.Op != OpSB || p.Uses == 1) ->
(MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem) (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
(MOVBstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} x) mem) && canMergeSym(sym1,sym2) -> (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem) && canMergeSym(sym1,sym2)
&& (x.Op != OpSB || p.Uses == 1) ->
(MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem) (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
// atomic intrinsics // atomic intrinsics

288
src/cmd/compile/internal/ssa/rewritePPC64.go
View File

@ -6369,22 +6369,22 @@ func rewriteValuePPC64_OpPPC64FMOVDload_0(v *Value) bool {
v.AddArg(x) v.AddArg(x)
return true return true
} }
// match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) // match: (FMOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) // result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64FMOVDload) v.reset(OpPPC64FMOVDload)
@ -6469,23 +6469,23 @@ func rewriteValuePPC64_OpPPC64FMOVDstore_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) // match: (FMOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) // result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[2] _ = v.Args[2]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
val := v.Args[1] val := v.Args[1]
mem := v.Args[2] mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64FMOVDstore) v.reset(OpPPC64FMOVDstore)
@ -6499,22 +6499,22 @@ func rewriteValuePPC64_OpPPC64FMOVDstore_0(v *Value) bool {
return false return false
} }
func rewriteValuePPC64_OpPPC64FMOVSload_0(v *Value) bool { func rewriteValuePPC64_OpPPC64FMOVSload_0(v *Value) bool {
// match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) // match: (FMOVSload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) // result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64FMOVSload) v.reset(OpPPC64FMOVSload)
@ -6577,23 +6577,23 @@ func rewriteValuePPC64_OpPPC64FMOVSstore_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) // match: (FMOVSstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) // result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[2] _ = v.Args[2]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
val := v.Args[1] val := v.Args[1]
mem := v.Args[2] mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64FMOVSstore) v.reset(OpPPC64FMOVSstore)
@ -6966,22 +6966,22 @@ func rewriteValuePPC64_OpPPC64MFVSRD_0(v *Value) bool {
return false return false
} }
func rewriteValuePPC64_OpPPC64MOVBZload_0(v *Value) bool { func rewriteValuePPC64_OpPPC64MOVBZload_0(v *Value) bool {
// match: (MOVBZload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) // match: (MOVBZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) // result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVBZload) v.reset(OpPPC64MOVBZload)
@ -7176,23 +7176,23 @@ func rewriteValuePPC64_OpPPC64MOVBstore_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) // match: (MOVBstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[2] _ = v.Args[2]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
val := v.Args[1] val := v.Args[1]
mem := v.Args[2] mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVBstore) v.reset(OpPPC64MOVBstore)
@ -7298,22 +7298,22 @@ func rewriteValuePPC64_OpPPC64MOVBstorezero_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (MOVBstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} x) mem) // match: (MOVBstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem) // result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
x := v_0.Args[0] x := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVBstorezero) v.reset(OpPPC64MOVBstorezero)
@ -7353,22 +7353,22 @@ func rewriteValuePPC64_OpPPC64MOVDload_0(v *Value) bool {
v.AddArg(x) v.AddArg(x)
return true return true
} }
// match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) // match: (MOVDload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVDload) v.reset(OpPPC64MOVDload)
@ -7453,23 +7453,23 @@ func rewriteValuePPC64_OpPPC64MOVDstore_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) // match: (MOVDstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[2] _ = v.Args[2]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
val := v.Args[1] val := v.Args[1]
mem := v.Args[2] mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVDstore) v.reset(OpPPC64MOVDstore)
@ -7531,22 +7531,22 @@ func rewriteValuePPC64_OpPPC64MOVDstorezero_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (MOVDstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} x) mem) // match: (MOVDstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
// result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem) // result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
x := v_0.Args[0] x := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVDstorezero) v.reset(OpPPC64MOVDstorezero)
@ -7559,22 +7559,22 @@ func rewriteValuePPC64_OpPPC64MOVDstorezero_0(v *Value) bool {
return false return false
} }
func rewriteValuePPC64_OpPPC64MOVHZload_0(v *Value) bool { func rewriteValuePPC64_OpPPC64MOVHZload_0(v *Value) bool {
// match: (MOVHZload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) // match: (MOVHZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) // result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVHZload) v.reset(OpPPC64MOVHZload)
@ -7697,22 +7697,22 @@ func rewriteValuePPC64_OpPPC64MOVHZreg_0(v *Value) bool {
return false return false
} }
func rewriteValuePPC64_OpPPC64MOVHload_0(v *Value) bool { func rewriteValuePPC64_OpPPC64MOVHload_0(v *Value) bool {
// match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) // match: (MOVHload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVHload) v.reset(OpPPC64MOVHload)
@ -7861,23 +7861,23 @@ func rewriteValuePPC64_OpPPC64MOVHstore_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) // match: (MOVHstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[2] _ = v.Args[2]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
val := v.Args[1] val := v.Args[1]
mem := v.Args[2] mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVHstore) v.reset(OpPPC64MOVHstore)
@ -7983,22 +7983,22 @@ func rewriteValuePPC64_OpPPC64MOVHstorezero_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (MOVHstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} x) mem) // match: (MOVHstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem) // result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
x := v_0.Args[0] x := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVHstorezero) v.reset(OpPPC64MOVHstorezero)
@ -8011,22 +8011,22 @@ func rewriteValuePPC64_OpPPC64MOVHstorezero_0(v *Value) bool {
return false return false
} }
func rewriteValuePPC64_OpPPC64MOVWZload_0(v *Value) bool { func rewriteValuePPC64_OpPPC64MOVWZload_0(v *Value) bool {
// match: (MOVWZload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) // match: (MOVWZload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) // result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVWZload) v.reset(OpPPC64MOVWZload)
@ -8179,22 +8179,22 @@ func rewriteValuePPC64_OpPPC64MOVWZreg_0(v *Value) bool {
return false return false
} }
func rewriteValuePPC64_OpPPC64MOVWload_0(v *Value) bool { func rewriteValuePPC64_OpPPC64MOVWload_0(v *Value) bool {
// match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) // match: (MOVWload [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVWload) v.reset(OpPPC64MOVWload)
@ -8373,23 +8373,23 @@ func rewriteValuePPC64_OpPPC64MOVWstore_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) // match: (MOVWstore [off1] {sym1} p:(MOVDaddr [off2] {sym2} ptr) val mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (ptr.Op != OpSB || p.Uses == 1)
// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[2] _ = v.Args[2]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
ptr := v_0.Args[0] ptr := p.Args[0]
val := v.Args[1] val := v.Args[1]
mem := v.Args[2] mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVWstore) v.reset(OpPPC64MOVWstore)
@ -8495,22 +8495,22 @@ func rewriteValuePPC64_OpPPC64MOVWstorezero_0(v *Value) bool {
v.AddArg(mem) v.AddArg(mem)
return true return true
} }
// match: (MOVWstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} x) mem) // match: (MOVWstorezero [off1] {sym1} p:(MOVDaddr [off2] {sym2} x) mem)
// cond: canMergeSym(sym1,sym2) // cond: canMergeSym(sym1,sym2) && (x.Op != OpSB || p.Uses == 1)
// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem) // result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
for { for {
off1 := v.AuxInt off1 := v.AuxInt
sym1 := v.Aux sym1 := v.Aux
_ = v.Args[1] _ = v.Args[1]
v_0 := v.Args[0] p := v.Args[0]
if v_0.Op != OpPPC64MOVDaddr { if p.Op != OpPPC64MOVDaddr {
break break
} }
off2 := v_0.AuxInt off2 := p.AuxInt
sym2 := v_0.Aux sym2 := p.Aux
x := v_0.Args[0] x := p.Args[0]
mem := v.Args[1] mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) { if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
break break
} }
v.reset(OpPPC64MOVWstorezero) v.reset(OpPPC64MOVWstorezero)