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cmd/internal/obj/arm: report invalid .S/.P/.W suffix in ARM instructions
Many instructions can not have a .S suffix, such as MULS, SWI, CLZ, CMP, STREX and others. And so do .P and .W suffixes. Even wrong assembly code is generated for some instructions with invalid suffixes. This patch tries to simplify .S/.W/.P checks. And a wrong assembly test for arm is added. fixes #20377 Change-Id: Iba1c99d9e6b7b16a749b4d93ca2102e17c5822fe Reviewed-on: https://go-review.googlesource.com/43561 Reviewed-by: Cherry Zhang <cherryyz@google.com>
This commit is contained in:
Ben Shi
Cherry Zhang
parent
4bf6c566d3
commit
5e79787935
@ -371,6 +371,10 @@ func TestARMEndToEnd(t *testing.T) {
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}
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}
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func TestARMErrors(t *testing.T) {
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testErrors(t, "arm", "armerror")
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}
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func TestARM64EndToEnd(t *testing.T) {
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testEndToEnd(t, "arm64", "arm64")
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}
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26
src/cmd/asm/internal/asm/testdata/arm.s
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26
src/cmd/asm/internal/asm/testdata/arm.s
vendored
@ -47,7 +47,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0
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// {
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// outcode($1, $2, &$3, 0, &$5);
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// }
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CLZ.S R1, R2
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CLZ R1, R2
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//
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// MOVW
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@ -114,9 +114,9 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0
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// {
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// outcode($1, $2, &$3, $5, &nullgen);
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// }
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CMP.S $1, R2
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CMP.S R1<<R2, R3
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CMP.S R1, R2
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CMP $1, R2
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CMP R1<<R2, R3
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CMP R1, R2
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//
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// MOVM
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@ -132,7 +132,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0
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// }
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MOVM 0(R1), [R2,R5,R8,g] // MOVM (R1), [R2,R5,R8,g]
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MOVM (R1), [R2-R5] // MOVM (R1), [R2,R3,R4,R5]
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MOVM.S (R1), [R2]
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MOVM (R1), [R2]
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// LTYPE8 cond '[' reglist ']' ',' ioreg
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// {
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@ -145,7 +145,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0
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// }
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MOVM [R2,R5,R8,g], 0(R1) // MOVM [R2,R5,R8,g], (R1)
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MOVM [R2-R5], (R1) // MOVM [R2,R3,R4,R5], (R1)
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MOVM.S [R2], (R1)
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MOVM [R2], (R1)
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//
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// SWAP
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@ -154,19 +154,19 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0
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// {
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// outcode($1, $2, &$5, int32($3.Reg), &$7);
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// }
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STREX.S R1, (R2), R3 // STREX.S (R2), R1, R3
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STREX R1, (R2), R3 // STREX (R2), R1, R3
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// LTYPE9 cond reg ',' ireg
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// {
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// outcode($1, $2, &$5, int32($3.Reg), &$3);
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// }
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STREX.S R1, (R2) // STREX.S (R2), R1, R1
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STREX R1, (R2) // STREX (R2), R1, R1
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// LTYPE9 cond comma ireg ',' reg
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// {
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// outcode($1, $2, &$4, int32($6.Reg), &$6);
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// }
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STREX.S (R2), R3 // STREX.S (R2), R3, R3
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STREX (R2), R3 // STREX (R2), R3, R3
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//
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// word
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@ -184,26 +184,26 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0
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// {
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// outcode($1, $2, &$3, 0, &$5);
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// }
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ABSF.S F1, F2
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ABSF F1, F2
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// LTYPEK cond frcon ',' freg
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// {
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// outcode($1, $2, &$3, 0, &$5);
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// }
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ADDD.S F1, F2
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ADDD F1, F2
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MOVF $0.5, F2 // MOVF $(0.5), F2
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// LTYPEK cond frcon ',' LFREG ',' freg
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// {
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// outcode($1, $2, &$3, $5, &$7);
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// }
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ADDD.S F1, F2, F3
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ADDD F1, F2, F3
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// LTYPEL cond freg ',' freg
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// {
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// outcode($1, $2, &$3, int32($5.Reg), &nullgen);
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// }
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CMPD.S F1, F2
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CMPD F1, F2
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//
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// MCR MRC
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10
src/cmd/asm/internal/asm/testdata/armerror.s
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Normal file
10
src/cmd/asm/internal/asm/testdata/armerror.s
vendored
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@ -0,0 +1,10 @@
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// Copyright 2017 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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TEXT errors(SB),$0
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MULS.S R1, R2, R3, R4 // ERROR "invalid .S suffix"
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ADD.P R1, R2, R3 // ERROR "invalid .P suffix"
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SUB.W R2, R3 // ERROR "invalid .W suffix"
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BL 4(R4) // ERROR "non-zero offset"
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END
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@ -597,6 +597,64 @@ func (c *ctxt5) asmoutnacl(origPC int32, p *obj.Prog, o *Optab, out []uint32) in
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return size
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}
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const (
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T_SBIT = 1 << 0
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T_PBIT = 1 << 1
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T_WBIT = 1 << 2
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)
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var mayHaveSuffix = map[obj.As]uint8{
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// bit logic
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AAND: T_SBIT,
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AEOR: T_SBIT,
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AORR: T_SBIT,
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ABIC: T_SBIT,
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// arithmatic
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ASUB: T_SBIT,
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AADD: T_SBIT,
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ASBC: T_SBIT,
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AADC: T_SBIT,
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ARSB: T_SBIT,
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ARSC: T_SBIT,
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// mov
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AMVN: T_SBIT,
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AMOVW: T_SBIT | T_PBIT | T_WBIT,
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AMOVB: T_SBIT | T_PBIT | T_WBIT,
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AMOVBS: T_SBIT | T_PBIT | T_WBIT,
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AMOVBU: T_SBIT | T_PBIT | T_WBIT,
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AMOVH: T_SBIT | T_PBIT | T_WBIT,
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AMOVHS: T_SBIT | T_PBIT | T_WBIT,
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AMOVHU: T_SBIT | T_PBIT | T_WBIT,
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AMOVM: T_PBIT | T_WBIT,
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// shift
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ASRL: T_SBIT,
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ASRA: T_SBIT,
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ASLL: T_SBIT,
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// mul
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AMUL: T_SBIT,
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AMULU: T_SBIT,
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AMULL: T_SBIT,
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AMULLU: T_SBIT,
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// mula
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AMULA: T_SBIT,
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AMULAL: T_SBIT,
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AMULALU: T_SBIT,
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// MRC/MCR
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AMRC: T_SBIT,
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}
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func checkBits(ctxt *obj.Link, p *obj.Prog) {
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if p.Scond&C_SBIT != 0 && mayHaveSuffix[p.As]&T_SBIT == 0 {
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ctxt.Diag("invalid .S suffix: %v", p)
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}
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if p.Scond&C_PBIT != 0 && mayHaveSuffix[p.As]&T_PBIT == 0 {
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ctxt.Diag("invalid .P suffix: %v", p)
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}
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if p.Scond&C_WBIT != 0 && mayHaveSuffix[p.As]&T_WBIT == 0 {
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ctxt.Diag("invalid .W suffix: %v", p)
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}
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}
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func span5(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
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var p *obj.Prog
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var op *obj.Prog
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@ -675,6 +733,9 @@ func span5(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
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if p.As == AMOVW && p.To.Type == obj.TYPE_REG && p.To.Reg == REGPC && p.Scond&C_SCOND == C_SCOND_NONE {
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c.flushpool(p, 0, 0)
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}
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checkBits(ctxt, p)
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pc += int32(m)
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}
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@ -2032,9 +2093,6 @@ func (c *ctxt5) asmout(p *obj.Prog, o *Optab, out []uint32) {
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if p.Scond&C_UBIT != 0 {
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o1 |= 1 << 23
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}
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if p.Scond&C_SBIT != 0 {
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o1 |= 1 << 22
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}
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if p.Scond&C_WBIT != 0 {
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o1 |= 1 << 21
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}
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@ -2610,9 +2668,6 @@ func (c *ctxt5) oprrr(p *obj.Prog, a obj.As, sc int) uint32 {
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if sc&C_SBIT != 0 {
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o |= 1 << 20
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}
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if sc&(C_PBIT|C_WBIT) != 0 {
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c.ctxt.Diag(".nil/.W on dp instruction")
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}
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switch a {
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case ADIVHW:
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return o | 0x71<<20 | 0xf<<12 | 0x1<<4
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@ -2666,6 +2721,9 @@ func (c *ctxt5) oprrr(p *obj.Prog, a obj.As, sc int) uint32 {
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return o | 0xc<<21
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case AMOVB, AMOVH, AMOVW:
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if sc&(C_PBIT|C_WBIT) != 0 {
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c.ctxt.Diag("invalid .P/.W suffix: %v", p)
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}
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return o | 0xd<<21
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case ABIC:
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return o | 0xe<<21
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@ -2799,9 +2857,6 @@ func (c *ctxt5) oprrr(p *obj.Prog, a obj.As, sc int) uint32 {
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}
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func (c *ctxt5) opbra(p *obj.Prog, a obj.As, sc int) uint32 {
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if sc&(C_SBIT|C_PBIT|C_WBIT) != 0 {
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c.ctxt.Diag("%v: .nil/.nil/.W on bra instruction", p)
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}
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sc &= C_SCOND
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sc ^= C_SCOND_XOR
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if a == ABL || a == obj.ADUFFZERO || a == obj.ADUFFCOPY {
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@ -2939,9 +2994,6 @@ func (c *ctxt5) olhrr(i int, b int, r int, sc int) uint32 {
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}
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func (c *ctxt5) ofsr(a obj.As, r int, v int32, b int, sc int, p *obj.Prog) uint32 {
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if sc&C_SBIT != 0 {
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c.ctxt.Diag(".nil on FLDR/FSTR instruction: %v", p)
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}
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o := ((uint32(sc) & C_SCOND) ^ C_SCOND_XOR) << 28
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if sc&C_PBIT == 0 {
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o |= 1 << 24
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