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cmd/compile: allow R11 to be allocated on s390x
R11 is only used as a temporary by a very small set of instructions (DIV, MOD, MULH and extended MVC/XC instructions). By marking these instructions as clobbering R11 we can allocate R11 in the general case. Change-Id: I0d4ffe80e57c164d42a5ea5ef6308756a5b0f742 Reviewed-on: https://go-review.googlesource.com/110255 Run-TryBot: Michael Munday <mike.munday@ibm.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
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@ -110,12 +110,13 @@ func init() {
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// Common individual register masks
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var (
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sp = buildReg("SP")
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sb = buildReg("SB")
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r0 = buildReg("R0")
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sp = buildReg("SP")
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sb = buildReg("SB")
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r0 = buildReg("R0")
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tmp = buildReg("R11") // R11 is used as a temporary in a small number of instructions.
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// R10 and R11 are reserved by the assembler.
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gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14")
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// R10 is reserved by the assembler.
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gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14")
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gpg = gp | buildReg("g")
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gpsp = gp | sp
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@ -135,11 +136,12 @@ func init() {
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// Common regInfo
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var (
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gp01 = regInfo{inputs: []regMask{}, outputs: gponly}
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gp11 = regInfo{inputs: []regMask{gp}, outputs: gponly}
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gp11sp = regInfo{inputs: []regMask{gpsp}, outputs: gponly}
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gp21 = regInfo{inputs: []regMask{gp, gp}, outputs: gponly}
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gp21sp = regInfo{inputs: []regMask{gpsp, gp}, outputs: gponly}
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gp01 = regInfo{inputs: []regMask{}, outputs: gponly}
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gp11 = regInfo{inputs: []regMask{gp}, outputs: gponly}
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gp11sp = regInfo{inputs: []regMask{gpsp}, outputs: gponly}
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gp21 = regInfo{inputs: []regMask{gp, gp}, outputs: gponly}
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gp21sp = regInfo{inputs: []regMask{gpsp, gp}, outputs: gponly}
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gp21tmp = regInfo{inputs: []regMask{gp &^ tmp, gp &^ tmp}, outputs: []regMask{gp &^ tmp}, clobbers: tmp}
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// R0 evaluates to 0 when used as the number of bits to shift
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// so we need to exclude it from that operand.
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@ -255,19 +257,19 @@ func init() {
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{name: "MULLDload", argLength: 3, reg: gpopload, asm: "MULLD", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 * *arg1. arg2=mem
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{name: "MULLWload", argLength: 3, reg: gpopload, asm: "MULLW", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 * *arg1. arg2=mem
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{name: "MULHD", argLength: 2, reg: gp21, asm: "MULHD", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
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{name: "MULHDU", argLength: 2, reg: gp21, asm: "MULHDU", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
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{name: "MULHD", argLength: 2, reg: gp21tmp, asm: "MULHD", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
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{name: "MULHDU", argLength: 2, reg: gp21tmp, asm: "MULHDU", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
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{name: "DIVD", argLength: 2, reg: gp21, asm: "DIVD", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
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{name: "DIVW", argLength: 2, reg: gp21, asm: "DIVW", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
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{name: "DIVDU", argLength: 2, reg: gp21, asm: "DIVDU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
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{name: "DIVWU", argLength: 2, reg: gp21, asm: "DIVWU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
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{name: "DIVD", argLength: 2, reg: gp21tmp, asm: "DIVD", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
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{name: "DIVW", argLength: 2, reg: gp21tmp, asm: "DIVW", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
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{name: "DIVDU", argLength: 2, reg: gp21tmp, asm: "DIVDU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
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{name: "DIVWU", argLength: 2, reg: gp21tmp, asm: "DIVWU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
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{name: "MODD", argLength: 2, reg: gp21, asm: "MODD", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
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{name: "MODW", argLength: 2, reg: gp21, asm: "MODW", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
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{name: "MODD", argLength: 2, reg: gp21tmp, asm: "MODD", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
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{name: "MODW", argLength: 2, reg: gp21tmp, asm: "MODW", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
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{name: "MODDU", argLength: 2, reg: gp21, asm: "MODDU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
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{name: "MODWU", argLength: 2, reg: gp21, asm: "MODWU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
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{name: "MODDU", argLength: 2, reg: gp21tmp, asm: "MODDU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
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{name: "MODWU", argLength: 2, reg: gp21tmp, asm: "MODWU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
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{name: "AND", argLength: 2, reg: gp21, asm: "AND", commutative: true, clobberFlags: true}, // arg0 & arg1
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{name: "ANDW", argLength: 2, reg: gp21, asm: "ANDW", commutative: true, clobberFlags: true}, // arg0 & arg1
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File diff suppressed because it is too large
Load Diff
@ -589,7 +589,7 @@ func (s *regAllocState) init(f *Func) {
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// in the rewrite rules so we always have a free register
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// available for global load/stores. See gen/386.rules (search for Flag_shared).
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case "s390x":
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// nothing to do, R10 & R11 already reserved
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s.allocatable &^= 1 << 11 // R11
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default:
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s.f.fe.Fatalf(src.NoXPos, "arch %s not implemented", s.f.Config.arch)
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}
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@ -825,30 +825,29 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1
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// gcWriteBarrier does NOT follow the Go ABI. It takes two arguments:
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// - R2 is the destination of the write
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// - R3 is the value being written at R2.
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// It clobbers R10 and R11 (the linker temp registers).
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// It clobbers R10 (the temp register).
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// It does not clobber any other general-purpose registers,
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// but may clobber others (e.g., floating point registers).
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TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$88
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TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$104
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// Save the registers clobbered by the fast path.
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MOVD R1, 80(R15)
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MOVD R4, 88(R15)
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MOVD R1, 96(R15)
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MOVD R4, 104(R15)
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MOVD g_m(g), R1
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MOVD m_p(R1), R1
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MOVD (p_wbBuf+wbBuf_next)(R1), R4
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// Increment wbBuf.next position.
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ADD $16, R4
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MOVD $16, R4
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ADD (p_wbBuf+wbBuf_next)(R1), R4
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MOVD R4, (p_wbBuf+wbBuf_next)(R1)
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MOVD (p_wbBuf+wbBuf_end)(R1), R1
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MOVD R1, R10 // R10 is linker temp register
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// Record the write.
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MOVD R3, -16(R4) // Record value
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MOVD (R2), R1 // TODO: This turns bad writes into bad reads.
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MOVD R1, -8(R4) // Record *slot
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MOVD R3, -16(R4) // Record value
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MOVD (R2), R10 // TODO: This turns bad writes into bad reads.
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MOVD R10, -8(R4) // Record *slot
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// Is the buffer full?
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CMPBEQ R4, R10, flush
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CMPBEQ R4, R1, flush
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ret:
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MOVD 80(R15), R1
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MOVD 88(R15), R4
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MOVD 96(R15), R1
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MOVD 104(R15), R4
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// Do the write.
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MOVD R3, (R2)
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RET
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@ -856,18 +855,11 @@ ret:
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flush:
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// Save all general purpose registers since these could be
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// clobbered by wbBufFlush and were not saved by the caller.
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MOVD R2, 8(R15) // Also first argument to wbBufFlush
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MOVD R3, 16(R15) // Also second argument to wbBufFlush
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STMG R2, R3, 8(R15) // set R2 and R3 as arguments for wbBufFlush
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MOVD R0, 24(R15)
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// R1 already saved.
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// R4 already saved.
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MOVD R5, 32(R15)
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MOVD R6, 40(R15)
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MOVD R7, 48(R15)
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MOVD R8, 56(R15)
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MOVD R9, 64(R15)
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// R10 and R11 are linker temp registers.
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MOVD R12, 72(R15)
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STMG R5, R12, 32(R15) // save R5 - R12
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// R13 is g.
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// R14 is LR.
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// R15 is SP.
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@ -875,13 +867,7 @@ flush:
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// This takes arguments R2 and R3.
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CALL runtime·wbBufFlush(SB)
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MOVD 8(R15), R2
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MOVD 16(R15), R3
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MOVD 24(R15), R0
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MOVD 32(R15), R5
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MOVD 40(R15), R6
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MOVD 48(R15), R7
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MOVD 56(R15), R8
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MOVD 64(R15), R9
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MOVD 72(R15), R12
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LMG 8(R15), R2, R3 // restore R2 - R3
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MOVD 24(R15), R0 // restore R0
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LMG 32(R15), R5, R12 // restore R5 - R12
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JMP ret
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