From 5c1a15df4141f77ba7c42c2c7c06d6eb22bcda63 Mon Sep 17 00:00:00 2001 From: Meng Zhuo Date: Sun, 25 Jun 2023 11:20:35 +0800 Subject: [PATCH] test/codegen: enable Mul2 DivPow2 test for riscv64 Change-Id: Ice0bb7a665599b334e927a1b00d1a5b400c15e3d Reviewed-on: https://go-review.googlesource.com/c/go/+/506035 TryBot-Result: Gopher Robot Reviewed-by: David Chase Reviewed-by: Keith Randall Reviewed-by: Keith Randall Run-TryBot: Keith Randall --- test/codegen/floats.go | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/test/codegen/floats.go b/test/codegen/floats.go index 81471082d4..9cb62e031a 100644 --- a/test/codegen/floats.go +++ b/test/codegen/floats.go @@ -20,6 +20,7 @@ func Mul2(f float64) float64 { // arm/7:"ADDD",-"MULD" // arm64:"FADDD",-"FMULD" // ppc64x:"FADD",-"FMUL" + // riscv64:"FADDD",-"FMULD" return f * 2.0 } @@ -29,6 +30,7 @@ func DivPow2(f1, f2, f3 float64) (float64, float64, float64) { // arm/7:"MULD",-"DIVD" // arm64:"FMULD",-"FDIVD" // ppc64x:"FMUL",-"FDIV" + // riscv64:"FMULD",-"FDIVD" x := f1 / 16.0 // 386/sse2:"MULSD",-"DIVSD" @@ -36,6 +38,7 @@ func DivPow2(f1, f2, f3 float64) (float64, float64, float64) { // arm/7:"MULD",-"DIVD" // arm64:"FMULD",-"FDIVD" // ppc64x:"FMUL",-"FDIVD" + // riscv64:"FMULD",-"FDIVD" y := f2 / 0.125 // 386/sse2:"ADDSD",-"DIVSD",-"MULSD" @@ -43,6 +46,7 @@ func DivPow2(f1, f2, f3 float64) (float64, float64, float64) { // arm/7:"ADDD",-"MULD",-"DIVD" // arm64:"FADDD",-"FMULD",-"FDIVD" // ppc64x:"FADD",-"FMUL",-"FDIV" + // riscv64:"FADDD",-"FMULD",-"FDIVD" z := f3 / 0.5 return x, y, z