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Revert "compile: prefer an AND instead of SHR+SHL instructions"
This reverts commit 9ec7074a94
.
Reason for revert: broke s390x (copysign, abs) and arm64 (bitfield) tests.
Change-Id: I16c1b389c062e8c4aa5de079f1d46c9b25b0db52
Reviewed-on: https://go-review.googlesource.com/c/go/+/193850
Run-TryBot: Martin Möhrmann <moehrmann@google.com>
Reviewed-by: Agniva De Sarker <agniva.quicksilver@gmail.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
This commit is contained in:
parent
9ec7074a94
commit
5bb59b6d16
@ -1863,8 +1863,9 @@
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(XORshiftLL <t> [c] (UBFX [bfc] x) x2) && c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)
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-> (EXTRWconst [32-c] x2 x)
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// Rewrite special pairs of shifts to AND.
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// On ARM64 the bitmask can fit into an instruction.
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// Generic rules rewrite certain AND to a pair of shifts.
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// However, on ARM64 the bitmask can fit into an instruction.
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// Rewrite it back to AND.
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(SRLconst [c] (SLLconst [c] x)) && 0 < c && c < 64 -> (ANDconst [1<<uint(64-c)-1] x) // mask out high bits
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(SLLconst [c] (SRLconst [c] x)) && 0 < c && c < 64 -> (ANDconst [^(1<<uint(c)-1)] x) // mask out low bits
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@ -542,6 +542,14 @@
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(Slicemask (Const64 [x])) && x > 0 -> (Const64 [-1])
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(Slicemask (Const64 [0])) -> (Const64 [0])
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// Rewrite AND of consts as shifts if possible, slightly faster for 64 bit operands
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// leading zeros can be shifted left, then right
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(And64 <t> (Const64 [y]) x) && nlz(y) + nto(y) == 64 && nto(y) >= 32
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-> (Rsh64Ux64 (Lsh64x64 <t> x (Const64 <t> [nlz(y)])) (Const64 <t> [nlz(y)]))
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// trailing zeros can be shifted right, then left
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(And64 <t> (Const64 [y]) x) && nlo(y) + ntz(y) == 64 && ntz(y) >= 32
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-> (Lsh64x64 (Rsh64Ux64 <t> x (Const64 <t> [ntz(y)])) (Const64 <t> [ntz(y)]))
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// simplifications often used for lengths. e.g. len(s[i:i+5])==5
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(Sub(64|32|16|8) (Add(64|32|16|8) x y) x) -> y
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(Sub(64|32|16|8) (Add(64|32|16|8) x y) y) -> x
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@ -5735,6 +5735,112 @@ func rewriteValuegeneric_OpAnd64_10(v *Value) bool {
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v.AddArg(y)
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return true
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}
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// match: (And64 <t> (Const64 [y]) x)
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// cond: nlz(y) + nto(y) == 64 && nto(y) >= 32
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// result: (Rsh64Ux64 (Lsh64x64 <t> x (Const64 <t> [nlz(y)])) (Const64 <t> [nlz(y)]))
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for {
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t := v.Type
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x := v.Args[1]
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v_0 := v.Args[0]
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if v_0.Op != OpConst64 {
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break
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}
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y := v_0.AuxInt
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if !(nlz(y)+nto(y) == 64 && nto(y) >= 32) {
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break
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}
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v.reset(OpRsh64Ux64)
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v0 := b.NewValue0(v.Pos, OpLsh64x64, t)
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v0.AddArg(x)
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v1 := b.NewValue0(v.Pos, OpConst64, t)
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v1.AuxInt = nlz(y)
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v0.AddArg(v1)
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v.AddArg(v0)
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v2 := b.NewValue0(v.Pos, OpConst64, t)
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v2.AuxInt = nlz(y)
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v.AddArg(v2)
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return true
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}
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// match: (And64 <t> x (Const64 [y]))
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// cond: nlz(y) + nto(y) == 64 && nto(y) >= 32
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// result: (Rsh64Ux64 (Lsh64x64 <t> x (Const64 <t> [nlz(y)])) (Const64 <t> [nlz(y)]))
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for {
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t := v.Type
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_ = v.Args[1]
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x := v.Args[0]
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v_1 := v.Args[1]
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if v_1.Op != OpConst64 {
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break
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}
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y := v_1.AuxInt
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if !(nlz(y)+nto(y) == 64 && nto(y) >= 32) {
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break
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}
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v.reset(OpRsh64Ux64)
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v0 := b.NewValue0(v.Pos, OpLsh64x64, t)
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v0.AddArg(x)
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v1 := b.NewValue0(v.Pos, OpConst64, t)
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v1.AuxInt = nlz(y)
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v0.AddArg(v1)
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v.AddArg(v0)
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v2 := b.NewValue0(v.Pos, OpConst64, t)
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v2.AuxInt = nlz(y)
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v.AddArg(v2)
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return true
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}
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// match: (And64 <t> (Const64 [y]) x)
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// cond: nlo(y) + ntz(y) == 64 && ntz(y) >= 32
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// result: (Lsh64x64 (Rsh64Ux64 <t> x (Const64 <t> [ntz(y)])) (Const64 <t> [ntz(y)]))
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for {
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t := v.Type
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x := v.Args[1]
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v_0 := v.Args[0]
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if v_0.Op != OpConst64 {
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break
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}
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y := v_0.AuxInt
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if !(nlo(y)+ntz(y) == 64 && ntz(y) >= 32) {
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break
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}
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v.reset(OpLsh64x64)
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v0 := b.NewValue0(v.Pos, OpRsh64Ux64, t)
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v0.AddArg(x)
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v1 := b.NewValue0(v.Pos, OpConst64, t)
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v1.AuxInt = ntz(y)
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v0.AddArg(v1)
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v.AddArg(v0)
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v2 := b.NewValue0(v.Pos, OpConst64, t)
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v2.AuxInt = ntz(y)
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v.AddArg(v2)
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return true
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}
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// match: (And64 <t> x (Const64 [y]))
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// cond: nlo(y) + ntz(y) == 64 && ntz(y) >= 32
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// result: (Lsh64x64 (Rsh64Ux64 <t> x (Const64 <t> [ntz(y)])) (Const64 <t> [ntz(y)]))
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for {
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t := v.Type
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_ = v.Args[1]
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x := v.Args[0]
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v_1 := v.Args[1]
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if v_1.Op != OpConst64 {
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break
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}
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y := v_1.AuxInt
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if !(nlo(y)+ntz(y) == 64 && ntz(y) >= 32) {
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break
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}
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v.reset(OpLsh64x64)
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v0 := b.NewValue0(v.Pos, OpRsh64Ux64, t)
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v0.AddArg(x)
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v1 := b.NewValue0(v.Pos, OpConst64, t)
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v1.AuxInt = ntz(y)
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v0.AddArg(v1)
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v.AddArg(v0)
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v2 := b.NewValue0(v.Pos, OpConst64, t)
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v2.AuxInt = ntz(y)
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v.AddArg(v2)
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return true
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}
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// match: (And64 (And64 i:(Const64 <t>) z) x)
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// cond: (z.Op != OpConst64 && x.Op != OpConst64)
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// result: (And64 i (And64 <t> z x))
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@ -5761,6 +5867,10 @@ func rewriteValuegeneric_OpAnd64_10(v *Value) bool {
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v.AddArg(v0)
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return true
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}
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return false
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}
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func rewriteValuegeneric_OpAnd64_20(v *Value) bool {
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b := v.Block
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// match: (And64 (And64 z i:(Const64 <t>)) x)
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// cond: (z.Op != OpConst64 && x.Op != OpConst64)
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// result: (And64 i (And64 <t> z x))
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@ -5874,10 +5984,6 @@ func rewriteValuegeneric_OpAnd64_10(v *Value) bool {
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v.AddArg(x)
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return true
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}
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return false
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}
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func rewriteValuegeneric_OpAnd64_20(v *Value) bool {
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b := v.Block
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// match: (And64 (Const64 <t> [c]) (And64 x (Const64 <t> [d])))
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// cond:
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// result: (And64 (Const64 <t> [c&d]) x)
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@ -81,7 +81,7 @@ func abs32(x float32) float32 {
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// Check that it's using integer registers
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func copysign(a, b, c float64) {
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// amd64:"BTRQ\t[$]63","ANDQ","ORQ"
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// amd64:"BTRQ\t[$]63","SHRQ\t[$]63","SHLQ\t[$]63","ORQ"
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// s390x:"CPSDR",-"MOVD" (no integer load/store)
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// ppc64:"FCPSGN"
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// ppc64le:"FCPSGN"
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@ -100,7 +100,7 @@ func copysign(a, b, c float64) {
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// s390x:"LNDFR\t",-"MOVD\t" (no integer load/store)
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sink64[2] = math.Float64frombits(math.Float64bits(a) | 1<<63)
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// amd64:"ANDQ","ORQ"
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// amd64:-"SHLQ\t[$]1",-"SHRQ\t[$]1","SHRQ\t[$]63","SHLQ\t[$]63","ORQ"
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// s390x:"CPSDR\t",-"MOVD\t" (no integer load/store)
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// ppc64:"FCPSGN"
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// ppc64le:"FCPSGN"
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