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internal/cpu: fix cpu cacheLineSize for arm64 darwin(a.k.a. M1)

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The existing value for M1 is 64, which is the same as other arm64 cpus.
But the correct cacheLineSize for M1 should be 128, which can be
verified using the following command:

$ sysctl -a hw | grep cachelinesize
hw.cachelinesize: 128

Fixes #53075

Change-Id: Iaa8330010a4499b9b357c70743d55aed6ddb8588
GitHub-Last-Rev: df87eb9c50
GitHub-Pull-Request: golang/go#53076
Reviewed-on: https://go-review.googlesource.com/c/go/+/408576
Reviewed-by: Keith Randall <khr@google.com>
Run-TryBot: Meng Zhuo <mzh@golangcn.org>
Reviewed-by: Ian Lance Taylor <iant@google.com>
Reviewed-by: Martin Möhrmann <martin@golang.org>
Reviewed-by: Keith Randall <khr@golang.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Auto-Submit: Keith Randall <khr@google.com>
This commit is contained in:
Pure White 2022-05-26 06:10:56 +00:00 committed by Gopher Robot
parent 2f6783c098
commit 59865f1420
1 changed files with 4 additions and 1 deletions
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5
src/internal/cpu/cpu_arm64.go
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@ -4,7 +4,10 @@
package cpu
const CacheLinePadSize = 64
// CacheLinePadSize is used to prevent false sharing of cache lines.
// We choose 128 because Apple Silicon, a.k.a. M1, has 128-byte cache line size.
// It doesn't cost much and is much more future-proof.
const CacheLinePadSize = 128
func doinit() {
options = []option{