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runtime, sync/atomic: fix arm cas
Works around bug in kernel implementation on old ARM5 kernels. Bug was fixed on 26 Nov 2007 (between 2.6.23 and 2.6.24) but old kernels persist. Fixes #1750. R=dfc, golang-dev CC=golang-dev https://golang.org/cl/4436072
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@ -258,11 +258,22 @@ TEXT cas<>(SB),7,$0
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TEXT runtime·cas(SB),7,$0
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MOVW valptr+0(FP), R2
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MOVW old+4(FP), R0
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casagain:
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MOVW new+8(FP), R1
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BL cas<>(SB)
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MOVW $0, R0
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MOVW.CS $1, R0
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BCC cascheck
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MOVW $1, R0
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RET
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cascheck:
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// Kernel lies; double-check.
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MOVW valptr+0(FP), R2
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MOVW old+4(FP), R0
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MOVW 0(R2), R3
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CMP R0, R3
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BEQ casagain
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MOVW $0, R0
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RET
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TEXT runtime·casp(SB),7,$0
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B runtime·cas(SB)
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@ -13,6 +13,12 @@
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// LR = return address
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// The function returns with CS true if the swap happened.
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// http://lxr.linux.no/linux+v2.6.37.2/arch/arm/kernel/entry-armv.S#L850
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// On older kernels (before 2.6.24) the function can incorrectly
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// report a conflict, so we have to double-check the compare ourselves
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// and retry if necessary.
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//
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// http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=b49c0f24cf6744a3f4fd09289fe7cade349dead5
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//
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TEXT cas<>(SB),7,$0
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MOVW $0xffff0fc0, PC
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@ -23,12 +29,23 @@ TEXT ·CompareAndSwapInt32(SB),7,$0
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TEXT ·CompareAndSwapUint32(SB),7,$0
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MOVW valptr+0(FP), R2
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MOVW old+4(FP), R0
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casagain:
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MOVW new+8(FP), R1
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BL cas<>(SB)
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MOVW $0, R0
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MOVW.CS $1, R0
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BCC cascheck
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MOVW $1, R0
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casret:
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MOVW R0, ret+12(FP)
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RET
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cascheck:
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// Kernel lies; double-check.
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MOVW valptr+0(FP), R2
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MOVW old+4(FP), R0
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MOVW 0(R2), R3
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CMP R0, R3
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BEQ casagain
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MOVW $0, R0
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B casret
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TEXT ·CompareAndSwapUintptr(SB),7,$0
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B ·CompareAndSwapUint32(SB)
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