qbit/go
1
0
Fork 0
mirror of https://github.com/golang/go synced 2024-11-26 07:17:59 -07:00
Code Releases Activity

[dev.typeparams] cmd/compile: define ARM64 parameter registers

Browse Source 
Define the registers.

They are not really enabled for now. Otherwise the compiler will
start using them for go:registerparams functions and it is not
fully working. Some test will fail.

Now we can compile a simple Add function with registerparams
(with registers enabled).

Change-Id: Ifdfac931052c0196096a1dd8b0687b5fdedb14d5
Reviewed-on: https://go-review.googlesource.com/c/go/+/322850
Trust: Cherry Mui <cherryyz@google.com>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Than McIntosh <thanm@google.com>
This commit is contained in:
Cherry Mui 2021-05-25 11:53:04 -04:00
parent cf23daeda3
commit 4bb927f82e
4 changed files with 11 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/cmd/compile/internal/arm64/ssa.go
View File

@ -161,6 +161,9 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
p.From.Type = obj.TYPE_REG
p.From.Reg = v.Args[0].Reg()
ssagen.AddrAuto(&p.To, v)
case ssa.OpArgIntReg, ssa.OpArgFloatReg:
// TODO: generate morestack spill code
ssagen.CheckArgReg(v)
case ssa.OpARM64ADD,
ssa.OpARM64SUB,
ssa.OpARM64AND,

4
src/cmd/compile/internal/ssa/config.go
View File

@ -228,6 +228,10 @@ func NewConfig(arch string, types Types, ctxt *obj.Link, optimize bool) *Config
c.registers = registersARM64[:]
c.gpRegMask = gpRegMaskARM64
c.fpRegMask = fpRegMaskARM64
// XXX commented out for now. Uncomment it will enable register args for
// go:registerparams functions, which isn't fully working, so tests fail.
//c.intParamRegs = paramIntRegARM64
//c.floatParamRegs = paramFloatRegARM64
c.FPReg = framepointerRegARM64
c.LinkReg = linkRegARM64
c.hasGReg = true

2
src/cmd/compile/internal/ssa/gen/ARM64Ops.go
View File

@ -765,6 +765,8 @@ func init() {
ops: ops,
blocks: blocks,
regnames: regNamesARM64,
ParamIntRegNames: "R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15",
ParamFloatRegNames: "F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15",
gpregmask: gp,
fpregmask: fp,
framepointerreg: -1, // not used

4
src/cmd/compile/internal/ssa/opGen.go
View File

@ -36400,8 +36400,8 @@ var registersARM64 = [...]Register{
{62, arm64.REG_F31, -1, "F31"},
{63, 0, -1, "SB"},
}
var paramIntRegARM64 = []int8(nil)
var paramFloatRegARM64 = []int8(nil)
var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
var gpRegMaskARM64 = regMask(670826495)
var fpRegMaskARM64 = regMask(9223372034707292160)
var specialRegMaskARM64 = regMask(0)